Welcome to Wireless Chip Designer – the only newsletter that covers the challenges of integrating analog design, analog mixed signal and Wireless functionality into silicon.

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This Month's Table of Contents:

1. Interoperable PCell Libraries Or Bust!
2. IC Design Services Industry Growing
3. RFICs Achieve Power Breakthrough For GSM Wireless Markets
4. Complete Low-Power Solution Delivered
5. Synopsys Named IBM-Authorized Power Architecture Design Center
6. Statistical Modeling Suite Rolled Out
7. Partnership Signals Japan's A/MS Software Demand
8. Agreement Extends Availability Of ARM Products
9. In-Depth Coverage Links
• Proper Planning Assures SoC Power Integrity
• Inherent Benefits of a Delta-Sigma Fractional-N PLL in Power-Conscious SoC Designs
10. New Books
11. Happenings -- Conferences

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   >> Gold Sponsor: Chip Design Trends
   >> Silver Sponsor: ESC Silicon Valley
   >> Bronze Sponsor: Chip Estimate

1. Viewpoint – Exclusive

Interoperable PCell Libraries Or Bust!

By Michael Ma, Vice President of Business Development, Ciranova, (www.ciranova.com)

The foundry industry has made great strides forward in providing complete, accurate PDKs (process design kits) for analog and custom design. However, recent advances in database technology by the EDA industry have created an opportunity to provide interoperable PCell libraries, which would support layout tools from multiple vendors. Although this would be a great benefit for chip designers, it has not yet happened.
Among the first steps in analog and mixed signal chip design are selecting the target process, then contacting the foundry to obtain a PDK for that process. PDKs contain schematic symbols, simulation models, DRC decks, and PCells for the target process. However, some components of these kits such as PCells are developed to support tools from just one EDA vendor. Foundries cannot justify the cost of providing separate PCell libraries for every different layout tool in the market. Unfortunately, this means that the designer who wishes to use the PDK supplied by the foundry is limited to using the tools supported by that PDK. This restricts design flexibility, and limits designer's ability to choose best-in-class tools. Full Story >>

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2. News

IC Design Services Industry Growing

India's IC design services industry will continue to grow at over 20 percent per year through 2010, reports In-Stat. Cost advantages and availability of skilled manpower have compelled integrated device manufacturers (IDMs) to either outsource part of their design activities to third-party design firms in India, or set up their own captive centers in the country. According to Mayank Jain, In-Stat analyst, "Indian design companies will continue to move up the value chain by increasingly accomplishing the entire design instead of doing piecemeal design work. Captive centers of IDMs work on cutting-edge technologies and contribute to the development of products for a global audience."
In-Stat >> http://www.instat.com

SOC Design...Market Analysis...Trends...Forecasts...Benchmarking

Based on data from over 37,000 project feasibility studies, Chip Design Trends is the only market newsletter and report that captures the details and provides analysis and forecasts on SoC design trends. Sign up for your free issue.

3. News

RFICs Achieve Power Breakthrough For GSM Wireless Markets

Freescale Semiconductor has announced the industry's first two-stage RF Integrated Circuits (RFICs) capable of delivering the 100-watt RF output power required for GSM and EDGE network base stations. The devices are the highest power two-stage RFICs to be offered commercially. When driven by Freescale's cost-effective MMG3005N general purpose amplifier, the MWE6IC9100N and MW7IC18100N RFICs form a comprehensive 100-W power amplifier solution for wireless base stations operating at 900 and 1800 MHz. The advantages are significant for the GSM and EDGE market. Historically, the output power of two-stage RFICs has been limited to less than 30 W, relegating their utility to driver and pre-driver stages. Previous designs required a separate high power transistor to achieve the 50 dB of gain and the 100 W of output power typically required for GSM EDGE transmitters. Now, only a general purpose amplifier and a single RFIC combine to meet this requirement.
Freescale Semiconductor >> http://www.freescale.com

ESC Silicon Valley, April 1-5, 2007 at the McEnery Convention Center

Witness the Power of Brain Power at the world's largest international embedded event and technical conference. Compare products and get answers directly from engineers. Be there when brains collide on topics such as Linux, Security, Networking, DSP, Hardware, System Design, and Real-Time development. Register by March 6th and save up to $300, use code UX36, http://www.embedded.com/esc/sv

4. News

Complete Low-Power Solution Delivered

Cadence Design Systems has introduced the Cadence Low-Power Solution, the industry's first fully integrated flow for logic design, verification and implementation of low-power chips. It integrates leading-edge design, verification and implementation technology with the Common Power Format (CPF) - an Si2 format for specifying power-saving - techniques early in the design process, to deliver an end-to-end low-power design solution to IC engineers. By preserving low-power design intent throughout the design, the solution eliminates laborious manual work, reduces power-related chip failure and provides power predictability early in the design process.
Cadence Design Systems >> http://www.cadence.com

5. News

Synopsys Named IBM-Authorized Power Architecture Design Center

Synopsys signed an agreement with IBM that enables it to sub-license IBM's PowerPC 440 and 405 embedded microprocessor cores and associated peripheral cores directly to customers. As a newly authorized Power Architecture Design Center, Synopsys now offers sub-licenses that include the right for customers to manufacture system-on-chip (SoC) designs incorporating PowerPC cores at any foundry of their choosing. The IBM cores are available through the Synopsys DesignWare Star IP Program. With this agreement, Synopsys becomes the second Power Architecture Design Center outside of IBM's own business line, and the only independent supplier to offer Power Architecture cores, EDA tools, design services, and other IP elements to address a full range of design issues. Customers can now obtain all the key design elements they need to create a Power Architecture-based SoC for their targeted foundry directly from Synopsys.
IBM >> http://www.ibm.com
Synopsys >> http://www.synopsys.com

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6. News

Statistical Modeling Suite Rolled Out

X-FAB Silicon Foundries in Erfurt, Germany, today completed the rollout of its statistical modeling suite for Monte Carlo simulation on its 0.6 and 0.35 micrometer analog/mixed-signal technology platforms. Using it, designers gain full flexibility to accommodate all variations associated with designing and manufacturing analog/mixed-signal ICs. The statistical models enable their designs to be more robust and meet performance specifications across a range of environmental conditions.
X-FAB Silicon Foundries AG >> http://www.xfab.com

7. International News

Partnership Signals Japan's A/MS Software Demand

Solido Design Automation announced a strategic business partnership with Aisys Corporation in Japan. This partnership will accelerate Solido's technology adoption in the growing Japanese semiconductor design market by utilizing Aisys' customer relationships and their experienced skill-set as a virtual subsidiary. According to Amit Gupta, president and CEO of Solido Design Automation. "Aisys's relationships with the key analog/mixed-signal, custom digital and memory semiconductor companies have already proven to be of great value to Solido and will be an asset to our business expansion efforts in Japan." The combination of Aisys sales, consulting and systems integration services with Solido's technology will give Japanese customers an unparalleled solution for their analog/mixed-signal and custom digital and memory needs.
Aisys Corporation >> http://www.aisys.co.jp
Solido Design Automation >> http://www.solidodesign.com

8. International News

Agreement Extends Availability Of ARM Products

Dongbu Electronics and ARM today announced a license agreement that extends the availability of ARM low-power and speed-and-density products (part of the ARM Artisan physical IP family) to designers developing chips using Dongbu's CMOS process at the 130-nanometer node. The ARM physical IP portfolio is ideally suited to support system-on-chip (SoC) designs targeting mobile handset and portable consumer applications, and will be offered to Dongbu’s foundry customers at no charge via the ARM website.
ARM >> http://www.arm.com
Dongbu Electronics >> http://www.dongbu.com

9. In-Depth Coverage Links

At 90 nm and below, avoiding IR drop and electromigration problems becomes a crucial aspect of SoC design. To learn more, read "Proper Planning Assures SoC Power Integrity."
Chip Design Editorial Feature >>
http://www.chipdesignmag.com/display.php?articleId=966&issueId=20

This paper compares and contrasts two types of PLLs, highlighting the benefits designers can exploit by using fractional PLLs in place of traditional integer solutions for system clocks. To learn more, read: "Inherent Benefits of a Delta-Sigma Fractional-N PLL in Power-Conscious SoC Designs."
iDesign Editorial Feature >>
http://www.chipdesignmag.com/display.php?articleId=1030

10. New Books

Switchmode RF Power Amplifiers
By: Andrei Grebennikov and Nathan Sokal
ISBN: 978-0-7506-7962-6
Publisher: Elsevier

A majority of people now have a digital mobile device, whether a cell phone, laptop or blackberry. Now that we have the mobility we want it to be more versatile and dependable; RF power amplifiers accomplish just that. These amplifiers take a small input and make it stronger and larger creating a wider area of use with a more robust signal. Switching mode RF amplifiers have been theoretically possible for decades, but were largely impractical because they distort analog signals until they are unrecognizable. However, distortion is not an issue with digital signals (like those used by WLANs and digital cell phones) and switching mode RF amplifiers have become a hot area of RF/wireless design. This book explores both the theory behind switching mode RF amplifiers and design techniques for them.
Elsevier >> http://www.elsevier.com

11. Happenings – Conferences

Embedded Systems Conference China
March 13-14, 2007
Shanghai, China
http://www.esconline.com/asia/

International Symposium on Quality Electronic Design (ISQED)
March 16-28, 2007
San Jose, CA
http://www.isqed.org

PCB Design Conference West
March 25-30, 2007
Santa Clara, CA
http://www.pcbwest.com/conf_prog/technical.html

International Symposium on Quality Electronic Design
ISQED '07
March 26-28, 2007
San Jose, CA
http://www.isqed.org

Multicore Expo
March 27-29, 2007
Santa Clara, CA
http://www.multicore-expo.com/

The International Wireless Communications Expo (IWCE) 2007
March 28-30, 2007
Las Vegas, NV
http://www.iwceexpo.com

2007 Embedded Systems Conference Silicon Valley
April 1-5, 2007
San Jose, CA
http://www.embedded.com

Design Automation and Test in Europe (DATE)
April 16-20, 2007
Acropolis, Nice, France
www.date-conference.com

Computerworld's 5th Annual Mobile & Wireless World Conference
May 21-23, 2007
Orlando, FL
http://www.mwwusa.com/

WOC 2007 Wireless and Optical Communications Conference
May 30–June 1, 2007
Montreal, Quebec, Canada
http://www.iasted.org/conferences/home-565.html

Design Automation Conference (DAC)
June 4-8, 2007
San Diego, CA
http://www.dac.com/44th/index.html

Semicon West 2007
July 16-20, 2007
San Francisco, CA
http://wps2a.semi.org/wps/portal/_pagr/123/_pa.123/302

WIRELESS CHIP DESIGNER e-NEWSLETTER CONTACTS

Editor: Cheryl Ajluni, cajluni@extensionmedia.com

Editorial Director: John Blyler, jblyler@extensionmedia.com

Advertising/Sponsorship Opportunities: Karen Popp, kpopp@extensionmedia.com

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