Who
Mehmet Cirit, Founder of Library Technologies

History
I first met Mehmet at Silicon Compilers in the 80’s and have kept in touch with him over the years.

What
New product – Chip Timer, speeds up ASIC designs by building digital library cells on the fly. Uses both Solution Ware and Cell Opt tools to do design optimization. This approach [...]

continue reading.....

Our panel discussion on Tuesday afternoon was well attended, thanks to the lively discussion from our three panelists:

Aaron Barker – Oracle, Broomfield, CO

Pierluigi Daglio – STMicroelectronics, Agrate, Italy

Jin-Qin Lu – Atheros Communications, Inc., Santa Clara, CA

Aaron Barker – Oracle, Broomfield, CO

Pierluigi Daglio – STMicroelectronics, Agrate, Italy

Jin-Qin Lu – Atheros [...]

continue reading.....

Blogging in EDA has its rewards and last night was a real treat as Synopsys provided a superb dinner experience at Mr. Stox in Anaheim.
I chatted with:

Harry the ASIC Guy
Yvette Huygen Deshpande, Synopsys – Director Worldwide PR
Joe Desposito, Electronic Design – Editor in Chief
Frank Schirmeister, Synopsys – Director Product Marketing, Solutions Group
Karen Bartleson, Synopsys – [...]

continue reading.....

Who
Dermott Lynch, VP of Sales and Marketing

Overview
May of 2009 introduced Silicon Frontline as a full-chip 3D extraction company, more accurate than pattern-based extraction tools.
Notes
News – TSMC has adopted Silicon Frontline in their AMS 1.0 reference flow for high precision analog (only field solver included).
UMC – uses Silicon Frontline to generate reference data (they still have [...]

continue reading.....

Who
Amit Gupta, President and CEO
Johnson Lau, Senior Director, Asia Sales
Kristopher Breen, Director of AEs
Overview
The Solido approach is to work along side your favorite SPICE circuit simulator to produce more efficient results and analysis for PVT corner simulations, Montel Carlo analysis and Well Proximity Effects by focusing on variation awareness during the design process.
Notes
Three tools: Variation [...]

continue reading.....

Who
Brad O’Connell, VP Sales and Marketing (PolyTeda since 2008)
Vlad Marchuk, President & CEO
Ravi Ravikumar, Marketing

Overview
PolyTeda has a new DRC tool called PowerDRC that scales well with the smallest nodes at 65nm and lower, running with predictability using a unique windowed approach instead of layer-at-time approach.
History
Founded: 2005 as Polyteda
Cadence – Acquired Vlad’s first EDA company in [...]

continue reading.....

Who
Paul Estrada, COO

What’s New in 2010?
Multi-core Parallel (MCP) – any simulation that iterates on a netlist (sweep, MC, corners), each are assigned to a different core.
-          8 core machine should get linear speed ups
-          Replace 25-50 HSPICE or Spectre with Berkley MCP option (-m 8 for 8 cores)
-          Have had multi-threading as a base feature, [...]

continue reading.....

What
Synopsys AMS breakfast.
Well attended breakfast session with about 100 people present.

Speakers
Satinderjiht, ARM
They use CustomSim for circuit simulation and their group does memory compilers. StarRC is used for RC extraction. The instance of memory that is generated is then simulated with CustomSim for timing, current and power numbers. Before CustomSim they used a traditional SPICE simulator [...]

continue reading.....

I prefer attending the Mentor party on Monday because I can actually hear what people are saying, as opposed to attending the Denali party where speech is barely possible with 120db music blaring non-stop. We boarded a bus from the convention center and were brought to Disneyland for appetizers and a fine meal.
On the bus [...]

continue reading.....

Who
Robert Hum, VP and GM for DSM Division

What
Eldo and ADiT update
Summary
Eldo is a traditional SPICE circuit simulator, first made popular in Europe. ADiT is an acquired Fast SPICE circuit simulator from Taiwan that replaced Mach TA a few years ago. ADiT Rail was re-launched and offers IR drop analysis and EM analysis, including viewing. Both [...]

continue reading.....