Carey Robertson – Mentor Graphics

Calibre xRC is a well accepted tool for pattern-based RC extraction and has worked well for years.

With smaller nodes Mentor now has a new tool for greater accuracy using a 3D field solver named xACT 3D.

I met with Carey Robertson on Monday morning at DAC to get a product overview.

The number of nets extracted per hour depends on the type of layout, 70K nets/hour for memories and 5K nets/hour for more complex layouts. Just use more cores or CPUs to decrease your run times.

This is still RLC extraction for digital and AMS designs, not the frequency dependent S-parameters from other field solvers used in microwave and RF applications.

Open Door Partner
GRID Sim is an Open Door partner and using xACT 3D to create an accurate RC netlist followed by GRID Sim for creating a macro-model, you could use any SPICE or Fast SPICE tool to do the most accurate IR drop or EM analysis. This combination should make other EDA companies nervous (Apache, Cadence, Synopsys, Magma).

My Notes
xACT 3D – overview of why it’s critical?
-    Contribution of parasitics is getting larger at 28nm nodes
-    45nm about 37% of all net cap was device, rest was interconnect
-    28nm about 28% was device cap, rest was interconnect
-    Modeling around device region is more complex (M3 and above is easy to get parasitics)
o    Lower level RC is more critical
-    At 45nm how do you get near device parasitics? Pattern based systems are not accurate enough around device
-    xACT 3D does great around devices, 3D field solver, deterministic,
-    Rule-based: distance based, fast, pre-calibrated structures
-    Field solver (like Raphael): uses Maxwell equations (Pextra technology is from an Austin start-up, acquired in June 2009)
o    Comparison of field solvers versus rule-based, 1,000 times slower typically
o    Magma, Synnopsys (Statistical methods, random walk – you set std deviation for errors, ie 1%, for 1 million nets you have 3,000 out-liers)
o    xACT can define difference between device and interconnect RLCs
-    Capacitances plotted versus error with respect to Raphael (xRC has more error compared to xACT, especially with small devices and interconnect)
-    xACT 3D has no calibration steps (xRC has calibration step) (STAR – From Synopsys)
o    running on 3million transistor design (at STARC, 70K nets/hour), memory designs with hierarchy
o    PLL could be 3K to 4K nets/hour/core
o    $250K for 4 cpus, $150K to get 8 cores (Perpetual license), term is different
o    RAM usage, 4 to 8GB on Master, 2GB per slave (SMP would need 32GB of RAM, consistent with Calibre nm)
o    Modes: 200, 400, 600 – change the meshing
o    Usage: similar to xrc, choose a mode (accuracy or speed)
o    UMC 40nm, TSMC 28nm (more to come from IBM, Global Foundry)
o    7 beta customers: NA, Taiwan, Europe (AEs can setup)
o    Speed comparison: about 10x faster than random-walk, always tighter than random-walk,
?    Within 3% weighted accuracy vs Raphael
?    8 threads 81 minutes, 1 thread 604 minutes (7.46 speed up)
o    Statistical tools – not consistent, especially if you rotate the layout (within 1% of self)
Training is simple
Users: Memory, analog, full custom, 28nm, TSMC AMS reference flow
Not full wave – no s parameters
Ansoft takes polygons – creates s parameters, full wave EM solution

Silicon front line – direct competitor
Synopsys NXT – random walk Raphael methods for production

GRID Sim – an opendoor partner, common customer (take xrc data)