Jun 05 2009

IEEE Nanotechnology Symposium 2009, Energy and Applications

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The IEEE Bay Area Council on Nanaotechnology held their 5th annual symposium in May.  The symposium had an increase in attendance over last year by about 10%, which shows the strength of interest in the area even in a tight economy.  The theme was loosely slated as “Enabling Energy Efficient Electronics” but the breadth of the speakers covered business of R&D, space applications, photonics, solar, environmental issues for Nano and the Memristor.

The plenary speaker was the recent Silicon Valley Engineering Hall of Fame inductee Robert Berry – Chairman Emeritus of Space Systems Division / Loral Space and Communications.  He presented a short history on the role of electronics in the satellite function and communication.  The direction to include nanotechnology is predication on the advancement of materials that are available in nano, the anticipated proliferation of “pico” satellites in the future and thermal benefits as mechanical properties of the nano solutions.  The area of power would be addressed in these new designs with improved battery technology based on nanoscale materials.  The issue of reliability for these “non-serviceable” end use application is reliability based on massive redundancy that is only available through nanotechnology.

The next keynote was from Mario Paniccia of Intel who discussed the directions in Silicon Photonics.  The main issues had to do with the changing role of solid state optics in the design process and circuit architectures.  Currently, the main place for optical components is in long haul communication.  The future direction is for rack-to-rack and board-to-board using the optical components that co-exist with standard CMOS technology.  In tera-scale computing (current simple dual and quad core designs moving to 10′s-100′s of cores), over 1/3 the design challenges that exist have to due with packaging and assembly that compatible with the high I/O data rates that are needed to feed these designs.  The keynote discussed several of the advances that are being made with PIN diodes with CMOS, hybrid processing including indium phosphate circuits with CMOS and in making Silicon optical gradients with traditional semiconductor processing.  One of the major areas of research is to understand and manage the thermal dynamics of the mixed Fiber interface / optical mux / laser / data & logic design systems whether it is a monolithic or hybrid form.

After the keynotes there were several additional photonics related papers on nanolithography options by Intel and on enhanced photodetectors from SiOnyx.  The next papers switched topic to energy.  Spike Narayan from IBM talked about memory technologies and the power issues for enterprise class memory.  The discussion included the limitations on air cooling and new materials and devices that being developed to help address this space.  The second energy paper was from Dr. Yi Cui from Stanford who reviewed a number of the new tested applications of the nanowires and some of their unique properties.

Stan Williams presented results on the latest test on operation and reliability for the Memristor.  HP is progessing on understanding the particle dynamics of the transport mechanism in the crystal lattice.  He indicated with the new measurement results, that it should be possible to stack up to 4 layers of the material on top of each other and end up with a storage density of 4TB/sq cm.
The final presentations were from Prith Banarjee of HP Labs with a business discussion that included the models and economics of short term and long term research in a corporate environment.  The sessions included three additional papers from Lars Thylen of the Royal Institueof Sweden who spoke on the status of several nanophotonics circuits Jeff Bokor from UC Berkeley who spone on Nanomagnetic logic, and Peter Peumans of Stanford who spone on design and architecture methodologies for high efficiency, low cost solar energy conversion methods based on MEMS and Nanotechnology manufacturing methods.

The event concluded with a diverse and electic panel discussion on energy and environmental impact of nanotechnology as both a solution to some issues as well as a source of energy consumption in manufacture and operation as well as the negative environmental impacts possible.  This discussion was moderated by Michael Janse of Harris & Harris, and had views presented by Spike Narayan from IBM, Shiv Chiruvolu fo NanoGram, Ying-Lan Chang of Nanomix, Inc, and Dr. Randall Milanowski from L3 Communications.  Spike represnted the R&D and development assigment of cost for the energy and environment issues in a large corp environemnt, Shiv and Yin-Lan described the energy footprint of their company’s products.  Randall presented the high reliability and particle tolerance perspective for several groups in the govt and military and these relate to naotechnology manufacturing and design.

PC

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One Response to “IEEE Nanotechnology Symposium 2009, Energy and Applications”

  1. venkatesh.on 23 Jul 2009 at 10:50 am

    eee symposiem

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