http://www.chipdesignmag.com/pallab EDA and Semiconductor Insights Mon, 08 Mar 2010 16:49:52 +0000 http://backend.userland.com/rss092 en Importance of low power has never been more pronounced as with this year’s ISSCC. Low power designs were highlighted in number of sessions throughout the conference. Some of the memorable ones were from Intel on the application of DVFS technique to 80-core processor, the clock power reduction using pulse latches ... http://www.chipdesignmag.com/pallab/2010/03/08/isscc-2010-%e2%80%93-low-power-designs-back-on-track-by-anand-iyer/ At the MEPTEC Chip to System symposium there a lot of discussion about the silicon that fits in the packages in addition to the package.  The opening keynote from Tom Gregorich framed the conference with the premise that chip scaling is going to be limited by the reality that sometimes ... http://www.chipdesignmag.com/pallab/2010/03/05/big-die-multi-die-thin-die-and-patents/ At the SPIE Advanced Lithography Conference, updates on NanoImprint technology, eBeam and Self Assembly techniques were presented that were all confident that EUV would be pushed out until the 16nm process node at the earliest.  In addition to new equipment (such as the Nikon NSR-S620D) and techniques for double & ... http://www.chipdesignmag.com/pallab/2010/02/26/imprint-ebeam-and-self-assembly-all-delay-euv-litho/ The 11th Annual International Symposium on Quality Electronic Design (www.isqed.org) and the 1st Annual International Solar Energy Technology Conference (www.isetc.org) have finalized their programs for March 22-24, 2010. The ISQED conference is once again featuring a full day of tutorials on the theme of Design Technologies and Opportunities in the Nano-Scale ... http://www.chipdesignmag.com/pallab/2010/02/18/isqed-and-isetc-programs-finalized/ Multi-Die packaging is one of the newer areas for co-design.  Space and function concerns are driving the multi-die assembly in the Z-axis direction.  There is a lot of activity in determining both engineering solutions and cost of production solutions for this space as was evident from the number of papers ... http://www.chipdesignmag.com/pallab/2010/02/12/3d-packaging-brings-new-design-challenges/ I recently had a chance to have a conversation with Judy Priest of Cisco about some of the design and packaging issues for accepting and qualifying new SOCs for high speed networking applications.  Historically, the high end network packages were being designed and selected as both heat spreaders and pitch ... http://www.chipdesignmag.com/pallab/2010/02/05/network-ics-packaging-is-a-key-design-element/ One of the key components of the audio systems (amplifers, guitars, mixers, etc) are the knobs and sliders.  Continuing their long history in the potentiometer business, they are re-issuing classic products and bringing out new products for new applications. On the classic side, they have reissued the Model 82 Vintage Premium ... http://www.chipdesignmag.com/pallab/2010/02/04/namm-2010-bourns-tunable-passives-drive-audio-design/ This years NAMM show, and some carryover from CES, was heavily focused on making use of the advanced processing & storage capabilities available in very low power form factors.  The result was Generation 3.0 of advanced sampling and modeling systems that now using the full data bandwidth and signal handling ... http://www.chipdesignmag.com/pallab/2010/02/01/namm-2010-sampling-modeling-gen-3-by-peter-chatterjee/ Recently there have been several blogs, emails and articles from people talking about benchmarks in DRC/LVS/RCE/Appl Rules (general class of Physical Verification or PV tools) and some of those were run using runsets from vendor A on tools from vendor B.  These benchmarks were created to show “whose’s tool is ... http://www.chipdesignmag.com/pallab/2010/01/29/what-is-the-big-deal-with-foundry-supplied-pv-runsets/ The CES big product trends were focused on 3D and tablet devices.  There were several component and design trends that were driving these devices.   Most of the products on the show floor were using standard products as components with customization either with programmable logic devices (e.g. FPGAs) or through ... http://www.chipdesignmag.com/pallab/2010/01/21/ces-2010-tvs-and-connectivity/