Jan 28 2013

Process Nodes Step Back at CES 2013

Published by at 3:00 pm under Uncategorized

This year’s CES show in Las Vegas had a major change in the semiconductor components driving the CE products. In the past, the show was the spotlight for the latest systems with the most advance process nodes making their entry. This year there was a change – the focus was on application diversity not just speed and power.

As more and more specifications for communication, and data interchange are based on timing and performance windows (minimum and maximum limits), the need to move to new process nodes to improve the component and lower prices has stalled. The cost of the new processes, while reducing die size, have disproportionately increased in mask tooling and test costs, so for small die and mid-volumes, the cost benefits are not being realized. This combined with foundry problems and availability issues at 32nm, 28nm and 22nm resulted in a lot of 40nm, 55nm and 65nm technology on the show floor.

In order to address the power and use targets in these larger nodes, chips were redesigned to support software and application level management of power down modes, more options for power down modes, and finer granularity on speed control of the parts. These parts were in new cell phones and tablets as well as communications (networking), storage, and entertainment products. The plethora of Bluetooth enabled devices (the 65 we saw that new the parts inside) had 55nm silicon solutions for the new 2013 products. Most of the automotive electronics were 55nm or 65nm. The imaging support and audio products were on the order of 130nm and 90nm solutions.

The 2013 CES has now shown the split in the process chase – processors and memory are on the cutting edge nodes, and the rest of CE is on high volume, low cost, large IP library processes. The day of chasing the front of the process curve for CE is now over – application and functional diversity have once again taken over – it is time to re-spin the 1970′s again.

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