Oct 29 2011
ARM Highlights Power and Processors
The 2011 ARM Techcon was well attended and busy this year. The technical sessions were rightfully quite packed as the topics being presented by ARM and it is many partners was low on product advertising and high on technical content – a rarity for many of today’s events. The conference addresses a diverse client base – IP creators/providers, SOC developers, FPGA users that integrate the cores, and systems designers that use both custom and standard products that incorporate the ARM cores. In past years, the communities were tightly integrated, this years event, chose to separate the two groups (chips and systems) segregating the “chip” folks to the “kids table and being out of sight/sound of the adults” and the “systems” folks to the “grown ups” who got the “big table in the main room”.
The challenge that results, is that attendees who are doing SOC design for a specific application, now need to attend all three days, but two of the days do not discuss the context of the architecture, test, programming and performance optimization that reviewed on the Systems days, The attendees building systems now also have to attend all three days to get the technology overviews, low power techniques, reliability and interface details from the chip day to understand how to take advantage of these features in their FPGA and board level implementations.
There were a number of design tradeoff sessions that had new design solutions such as the SiTime MEMS resonator which in addition to being a stacked die integratable solution, also allows for the elimination of PLLs in the SOC design and the timing issues associated with the jitter in traditional PLL based clock distribution designs. This is becoming more critical as additional sensors are being used in these multi-core systems, so temperature compensation and data converter stability have increased impact on the overall performance. The results are fsec jitter levels on a 100Mhz clock.
The systems day included an overview of ARM itself and had a nice tradeoff comparison of the ARM vs Cortex processors, and the 16, 32 and 64 bit instruction sets, applications, and programing requirements for the various applications. This discussion included the multi-core architectures and pipeline designs of these cores and the associated AMBA system IP / Mali Media IP.
An overall theme was that the ARM IP was designed for minimizing power consumption while providing the highest performance/power ratio in the industry. This has allowed the IP to be used in literally Billions of end products shipped, since the company was formed in 1990. The product line was shown to be addressing the shift in market need from simple control of an application to being a main compute processor for mobile multi-media data consumption.
PC