Archive for August, 2011

Aug 28 2011

Unity Semiconductor Update – August 2011

Published by under Uncategorized

At the Flash Memory Summit, we had a chance to meet with David Eggleston who is the CEO of Unity Semi.  The RRAM company has recently re-targeted its business model.  The new model is based on a traditional IP licensing structure which includes process, design and scalability licenses.  The IP is based in part on their 120 patents for the CMOX cell technology that have been granted, and the over 100 that are in process.
The current portfolio of IP includes cells, product and macro designs, architectures, and application support (interface design, SDKs, etc).  They have announced one licensee which is Micron Technology which announced a 2 year JDP starting in 2010.
Currently the company is receiving 1/3 of its revenue from product sales and design/process services with their fab lite model.  They are targeting fabs, IDM and ODMs as licensing partners.
The company was formed in 2002, and created the first CMOX cells in 2004.  The cells are available in single bit (SLC), dual bit (MLC) and triple bit (TLC) data architectures. Backers Seagate and Micron are driving the technology for cloud based applications of active memory with a new optimization point for capacity, performance, ease of use and low cost.
The page based memory are moving towards a cents/GB cost with 1TB Capacity, and performance in the 500Mb/s R & 200Mb/s W range.
PC

At the Flash Memory Summit, we had a chance to meet with David Eggleston who is the CEO of Unity Semi.  The RRAM company has recently re-targeted its business model.  The new model is based on a traditional IP licensing structure which includes process, design and scalability licenses.  The IP is based in part on their 120 patents for the CMOX cell technology that have been granted, and the over 100 that are in process.

The current portfolio of IP includes cells, product and macro designs, architectures, and application support (interface design, SDKs, etc).  They have announced one licensee which is Micron Technology which announced a 2 year JDP starting in 2010.

Currently the company is receiving 1/3 of its revenue from product sales and design/process services with their fab lite model.  They are targeting fabs, IDM and ODMs as licensing partners.

The company was formed in 2002, and created the first CMOX cells in 2004.  The cells are available in single bit (SLC), dual bit (MLC) and triple bit (TLC) data architectures. Backers Seagate and Micron are driving the technology for cloud based applications of active memory with a new optimization point for capacity, performance, ease of use and low cost.

The page based memory are moving towards a cents/GB cost with 1TB Capacity, and performance in the 500Mb/s R & 200Mb/s W range.

PC

No responses yet

Aug 28 2011

New Memory – MRAM at Flash Mem Summit

Published by under Uncategorized

At the Flash Memory Summit in August, there was a non-Flash session dealing with new memory technologies.  It covered both RRAM and MRAM also known as Resistive RAM and Magnetic RAM technologies.
The Magnetic RAM (MRAM) arena also presented an technology update.  The updates were from Avalanche Tech, Corcus, Everspin, MagSil and new startup Spin Transfer Technology.  Avalanche Tech lead things off with an update of their 3rd Generation MRAM product which is a spin programable memory.  The structure is best fit att addressing the SLC NOR and embedded SLC marketplace since it has a fast switching time (under 1ns) and is 3D stack-able to approach the high densities.  The product can also be configured to DRAM type applications, which make it a good universal memory product for both the controller interface and product store of Enterprise class SSDs.
Crocus discussed some of the details on their new JDP with a Russian Nanoelectronics Corp which will be investing $300M to bring up a 12″ fab for the technology.  The technology is base on an MLU concept (Magnetic Logic Unit) block that has it’s memory element from a TAS (Thermaly Assisted Switching) technology.  The MLU implements a “native XOR” function in the cell design.  The new strucutre is a self differential cell that supports high temperature operation and assembly (200C operation).  The Crocus designs are applicable for NAND replacement, MLC applications, and both CAM/TCAM uses.
MagSil, a seven year old fabless startup gave an overview of thier technology which has been designed in 180nm and is extensible to 18nm without physics changes.  They have been concentrating on solving the field issues related to the switching of magnetic films and have now developed solutions that are compatible with both Copper (Cu) and Aluminum (Al) interconnect solutions.  They are expecting sample parts to be available in the 2013 time frame.
A new entry to the MRAM arena is Spin Transfer Technology (STT) which described an Orthoganal Spin Transfer (OST) technology.  This type of MRAM has a structured, deterministic switching torque.  This characteristic can be used to drive for instant on-instant off memory applications for the mobile marketplace.  The technology, tested to the block level so far, has a 99% probability of <1ns switching between states.
The last update was from Everspin, which is the only company that is commercially shipping MRAM products to applications.  Their customers include Airbus and BMW, and theiy have shipped 3M pcs to date.  Thier fab light model includes thier BEOL fab for the MRAM using base layers built by commercial CMOS foundry.  They currently have over 70 product SKUs and their main use is in SPI SRAM replacement.  The durability of the product is proven by the application from Airbus which is the memory for the blackbox.

At the Flash Memory Summit in August, there was a non-Flash session dealing with new memory technologies.  It covered both RRAM and MRAM also known as Resistive RAM and Magnetic RAM technologies.

The Magnetic RAM (MRAM) arena also presented an technology update.  The updates were from Avalanche Tech, Corcus, Everspin, MagSil and new startup Spin Transfer Technology.  Avalanche Tech lead things off with an update of their 3rd Generation MRAM product which is a spin programable memory.  The structure is best fit att addressing the SLC NOR and embedded SLC marketplace since it has a fast switching time (under 1ns) and is 3D stack-able to approach the high densities.  The product can also be configured to DRAM type applications, which make it a good universal memory product for both the controller interface and product store of Enterprise class SSDs.

Crocus discussed some of the details on their new JDP with a Russian Nanoelectronics Corp which will be investing $300M to bring up a 12″ fab for the technology.  The technology is base on an MLU concept (Magnetic Logic Unit) block that has it’s memory element from a TAS (Thermaly Assisted Switching) technology.  The MLU implements a “native XOR” function in the cell design.  The new strucutre is a self differential cell that supports high temperature operation and assembly (200C operation).  The Crocus designs are applicable for NAND replacement, MLC applications, and both CAM/TCAM uses.

MagSil, a seven year old fabless startup gave an overview of thier technology which has been designed in 180nm and is extensible to 18nm without physics changes.  They have been concentrating on solving the field issues related to the switching of magnetic films and have now developed solutions that are compatible with both Copper (Cu) and Aluminum (Al) interconnect solutions.  They are expecting sample parts to be available in the 2013 time frame.

A new entry to the MRAM arena is Spin Transfer Technology (STT) which described an Orthoganal Spin Transfer (OST) technology.  This type of MRAM has a structured, deterministic switching torque.  This characteristic can be used to drive for instant on-instant off memory applications for the mobile marketplace.  The technology, tested to the block level so far, has a 99% probability of <1ns switching between states.

The last update was from Everspin, which is the only company that is commercially shipping MRAM products to applications.  Their customers include Airbus and BMW, and theiy have shipped 3M pcs to date.  Thier fab light model includes thier BEOL fab for the MRAM using base layers built by commercial CMOS foundry.  They currently have over 70 product SKUs and their main use is in SPI SRAM replacement.  The durability of the product is proven by the application from Airbus which is the memory for the blackbox.

PC

No responses yet

Aug 28 2011

New Memories- RRAM at Flash Mem Summit

Published by under Uncategorized

At the Flash Memory Summit in August, there was a non-Flash session dealing with new memory technologies.  It covered RRAM and MRAM also known as Resistive RAM and Magnetic RAM technologies.
The summit is well known for showcasing new technologies, in the past few years, the emphasis has been on Phase Change Memories as the leading alternate technology, and that technology has now moved into commercial production.
The Resistive RAM session (RRAM) is technologies utilizing the resistive characteristics of the Oxygen Molecule in a crystalline lattice.   The companies presenting updates were Unity, Sony, HP Labs and Adesto.  The sector actually has two base technologies – ReRAM which is the resistive oxygen, and CBRAM which is based on resistance of the conductive filaments in the RAM cell.
Unity and HP Labs discussed their movement towards the high capacity (1TB) storage of a multi-layer cross point memory.  The HP Lab product is utilizing the MEMRISTOR technology that is built using a TiO2 cell with Pt Caps.  The Unity solution is also using an Oxygen movement mechanism in their CMOX technology.   Both are targeted for high capacity active storage applications.
Sony’s Emerging Memory group discussed ther new NVM for RRAM which is based on an an electrolytic cell made with CuTe and a select transistor.  This cell was recently built as a 4MB test macro, and the results were presented in detail at ISSCC 2011 in Feb of this year.  The resulting block was able to perform data througput at 2.3Gb/s with 100ns of latency.
Adesto discussed their Conductive Bridging RAM.  This is also a RAM type device application and has a new corner on the feature optimization.  The product is targeted at tradeoff optimization for write performance, write endurance, data retention and low power operation.  The technology should be sampling in the 2nd half of 2011, and there are several customers who are awaiting the samples for their systems.
These technologies are looking to be in volume production in the 5-10 year time frame.
PC

At the Flash Memory Summit in August, there was a non-Flash session dealing with new memory technologies.  It covered RRAM and MRAM also known as Resistive RAM and Magnetic RAM technologies.

The summit is well known for showcasing new technologies, in the past few years, the emphasis has been on Phase Change Memories as the leading alternate technology, and that technology has now moved into commercial production.

The Resistive RAM session (RRAM) is technologies utilizing the resistive characteristics of the Oxygen Molecule in a crystalline lattice.   The companies presenting updates were Unity, Sony, HP Labs and Adesto.  The sector actually has two base technologies – ReRAM which is the resistive oxygen, and CBRAM which is based on resistance of the conductive filaments in the RAM cell.

Unity and HP Labs discussed their movement towards the high capacity (1TB) storage of a multi-layer cross point memory.  The HP Lab product is utilizing the MEMRISTOR technology that is built using a TiO2 cell with Pt Caps.  The Unity solution is also using an Oxygen movement mechanism in their CMOX technology.   Both are targeted for high capacity active storage applications.

Sony’s Emerging Memory group discussed ther new NVM for RRAM which is based on an an electrolytic cell made with CuTe and a select transistor.  This cell was recently built as a 4MB test macro, and the results were presented in detail at ISSCC 2011 in Feb of this year.  The resulting block was able to perform data througput at 2.3Gb/s with 100ns of latency.

Adesto discussed their Conductive Bridging RAM.  This is also a RAM type device application and has a new corner on the feature optimization.  The product is targeted at tradeoff optimization for write performance, write endurance, data retention and low power operation.  The technology should be sampling in the 2nd half of 2011, and there are several customers who are awaiting the samples for their systems.

These technologies are looking to be in volume production in the 5-10 year time frame.

PC

No responses yet