Dec 14 2009

IEDM 2009 – Numonyx advances phase-change memory

Published by at 2:07 am under Uncategorized

At the 2009 International Electron Device Meeting (IEDM) Numonyx presented 4 papers about their advances in phase change memory based on their 45nm 4th generation test chip and process development.  These were in addition to the announcement that the 90nm 1GB PCM part was going to be available as a production product in Q1 of 2010.  This part has a pinout compatible with existing flash parts of the same configuration so it can fit in existing sockets.
The 45nm technology was selected for the 4th generation, continuing the technology node jumping that has been a hallmark of the PCM development since the 2003 JDP with Intel and ST, to get tot he goal of litho parity with DRAM and cell party with flash.  The new LP 45nm devices achieve a cell size of 5.5 feature sq, flash is at levels of 5 feature sq, and DRAM is at 6-8 feature sq.  The new 45nm product is targeted at enterprise class products and results showing reliability at those targets were achieved.  Results in tests based on direct bit addressing showed 1M cycles of write endurance, data retention over 10 yrs.  These are based on a 1.5v socket, where the lower power is achieved through zero (0) effective standby power and active power about the same as DRAM.
Additional papers covered the 3D aspects of PCM.  Papers were presented that had a thin film diode element for the select device in addition to the memory element, in a crosspoint array.  This would allow for veritical stacking of the memories which could reduce the effective cell area up to factors of 4 with a 5 layer stack.  The JDP with Intel has produced a 64MB device with multi-level PCM memories using both thin film (TF) select and memory devices.
The last paper presented the use of PCM in embedded applications. This utilized a standard CMOS select device with a PCM TFT memory element located over the active select device.  The memory core in instantiated as a standard macro block into a P&R flow and has normal keep-out and routing rules.  The major design consideration with the use of PCM in an embedded application, is the thermal properties of the memory element.  PCM memories are thermally programmed, as a result, any design with an embedded PCM memory will have to be after board assembly programed, as the solder reflow process (typically 130o ) will cause the memory to reset.
PC

At the 2009 International Electron Device Meeting (IEDM) Numonyx presented 4 papers about their advances in phase change memory based on their 45nm 4th generation test chip and process development.  These were in addition to the announcement that the 90nm 1GB PCM part was going to be available as a production product in Q1 of 2010.  This part has a pinout compatible with existing flash parts of the same configuration so it can fit in existing sockets.

The 45nm technology was selected for the 4th generation, continuing the technology node jumping that has been a hallmark of the PCM development since the 2003 JDP with Intel and ST, to get tot he goal of litho parity with DRAM and cell party with flash.  The new LP 45nm devices achieve a cell size of 5.5 feature sq, flash is at levels of 5 feature sq, and DRAM is at 6-8 feature sq.  The new 45nm product is targeted at enterprise class products and results showing reliability at those targets were achieved.  Results in tests based on direct bit addressing showed 1M cycles of write endurance, data retention over 10 yrs.  These are based on a 1.5v socket, where the lower power is achieved through zero (0) effective standby power and active power about the same as DRAM.

Additional papers covered the 3D aspects of PCM.  Papers were presented that had a thin film diode element for the select device in addition to the memory element, in a crosspoint array.  This would allow for veritical stacking of the memories which could reduce the effective cell area up to factors of 4 with a 5 layer stack.  The JDP with Intel has produced a 64MB device with multi-level PCM memories using both thin film (TF) select and memory devices.

The last paper presented the use of PCM in embedded applications. This utilized a standard CMOS select device with a PCM TFT memory element located over the active select device.  The memory core in instantiated as a standard macro block into a P&R flow and has normal keep-out and routing rules.  The major design consideration with the use of PCM in an embedded application, is the thermal properties of the memory element.  PCM memories are thermally programmed, as a result, any design with an embedded PCM memory will have to be after board assembly programed, as the solder reflow process (typically 130o ) will cause the memory to reset.

PC

One response so far

One Response to “IEDM 2009 – Numonyx advances phase-change memory”

  1. # robiton 20 Dec 2009 at 9:44 am

    The threshold switch Numonyx is using as the selector has some interesting crystal and quantum mechanisms going on in its’ operation. It is their variation of Stan Ovshinsky’s Ovonic Threshold Switch. The OTS is related to Stan’s Ovonic Memory Switch, which he proposes as the basis for a new and more robust computer processor.

    http://www.ovonic.com/PDFs/cognitive_computer/sro_mrs_invited_talk_paper.pdf

    There is a lot of research going on regarding the composition of the chalcogenide and how to use the different mechanisms responsible for the threshold switching.

    Google this: chalcogenide + “intrinsic defect” + threshold

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