Sep 28 2009

IDF 2009 – New interfaces along with the platforms

Published by at 4:53 pm under Uncategorized

At the Intel Developer Forum this week, the systems interfaces got an update along with the new processor platform strategies.  There were first product looks at DDR3, SATA 3.0 (also known as SATA6G), Display Port V1.2 an USB3.0, all of which focused on higher performance at less power.  These interfaces appeared at multiple vendors, while Intel introduced their LightPath peripheral interconnect system.

Samsung was showing their high performance, green, reduced power DDR3 memories.  These modules are targeted at the server marketplace as they are designed to operate at 1.35v rather than the standard 1.5v.   These new memories are on the shrunk process and have a 40nm target geometry.  In addition to the lowered operating voltage and smaller process, the new memories will also be available in higher densities.  The current DDR2 SIMMs are in a 1GB configuration, the new DDR3 ones will also be available in a 2GB configuration, and eventually in 4GB-32GB versions.  These improvements result in a 73% power reduction at the memory SIMM level or 38% overall at the system level.  The 4GB configuration will be shipping in 2010.  These memories are optimized for the high density multi-processor servers, fitting in the U1 form factor and were demonstrated at IDF, that will use upwards of 1TB of RAM per unit.  These memories are direct connecting to the CPU in the new configurations and no longer going through the chipset for control.

For storage interfaces there was an update on the SATA interface and SSDs..  The SATA 2.0 conversion as the new interface is completed with 99% of desktops, 97.7& of laptops and 27.6% of enterprise drives using the interface.  On the enterprise side, the primary application is bulk backup and storage rather then front-line high performance applications.  The upcoming Q1 ‘10 ratification of the SATA 3.0 (6GB/Sec) specification includes compatibility with existing cables that are SATA 2.0 compliant, the adoptions of a new mini-SATA connection called mSATA and peripheral host auto-speed negotiation for 1.5G, 3.0G and 6G operation.  The new mSATA connection is aimed to be used by an OEM for an SSD application of  a small secondary or OS holding primary drive, that can fit in the re-purposed PCIe space on the underside of a laptop or netbook.  The new peripheral 7mm optical connector will be protocol and certification compliant with the SATA 3.0 standard.  The new 6GB/s operation will be designated with a new certification logo.

Intel’s SSD group also debuted a PCIE to DDR3 SSD solution that produced over 1M IOPS.  This was not a product, rather it was a working concept prototype of things that can be done with SSDs.  The PCIE interface is not a “hot swappable” connection and it also does not support the ECC methods that are typically employed for enterprise applications, so it is not usable in current form.  Although the speed and performance was outstanding, there is significant research that is needed to bring the solution to a viable product.

VESA presented a status and update to their Display Port (DP) V1.2 specification.  The status is the 1H ‘09 DP installation is 68M Notebook LCDs, 87M Monitor LCDs, and 60M TV LCDs.  Current DP products include adapters from DP to VGA, DVI, HMDI.  The interconnect specification for V1.2 includes a performance increase to 21.6Gbps which provides full HD stereo display at 120Hz, high resolution of 3840x2160x30bpp, the compatibility with full 4K and 3K support, The new specification will support multiple displays in a single cable – dual 2560×1600 (WQXGA) displays or quad 1920×1200 (WUXGA) displays.  It also includes a bi-directional high speed AUX channel that can support a microphone and audio channels, camera video transfer and full USB2.0 peripheral data transfer.  These features, and the lower power specification, are to be available in the standard connector and also the new mini-DP (mDP) connector that was donated to the specification by Apple.  The new DP spec which is targeted for completion at the end of Dec 2009, is expected to drive the industry EOL phasing for VGA, DVI and LVDS in the 2012-2014 time-frame.

The interface of high expectation at the show was SuperSpeed USB3.0.  While Intel was notably absent with their hot adapter and chipset for the standard, the rest of the community was moving forward on schedule.  NEC had one of the most prominent positions on the show floor with their exhibition of the first single chip USB3.0 (5G) host controller.  This design supports 2 ports (2x USB3.0 or 2x USB2.0) and occupies 1 lane of a PCIE2.0 interface.  This part is available in Oct 2009 along with a reference board/schematics and application notes/specifications.   In addition to the reference design, they are making the core available as an ASIC/IP block as part of their USB3.0 SOC design solutions program.  This includes a development software kit to support the IP in the form of a USB3.0 PHY, USB3.0 LINK and USB3.0 EPC, DDR2 or DDR3 interface, a SATA/Flash IF, video IF, a specialized ARM core with controller memory.  The only functions the customer needs to add for the ASIC is thier own application custom logic.  These blocks are available now, and are being incorporated in new customer designs at this time.


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