Pallab’s Place

Ciranova was showing thier Helix product for analog placement and routing.  The system uses a Phycell environment, optimally created with the non-design objects such as taps and dummies included as part of the Phycell, and a set of constraints to create custom analog (device level) layout options.  The new addition to this tool is the analog router to for connection of the placed blocks.  As the tool is built on OA, the full design structure is rule based and correct by construction.  The OA database can be verified by most of the commercial tools (Synopsys, Mentor, Cadence) for DRC/LVS/OPC/etc.   The tools continues to supports both flat and hierarchical modes of construction and is schematic/netlist driven.  With the release of the first major foundry independent Phycell library (TSMC), there are now actual rules and design constraints defined.  This removes the majority of the configuration bottlenecks.  They also were demonstrating the free PhyCell Studio which is editing, creation and viewing tool for their open source PhyCell reference library.

Physware and Silicon Frontline are both companies that are selling a 3d field solver product, and both have former Nassda founder Sang Wang involved.  Physware is focusing on the Chip-Board-System marketplace for EM and Noise analysis.  Silicon Frontline is focusing on the IC design marketplace for RC, R and electro-thermal extraction.

Physware has a new full 3D EM field solver that provided significant speed up over older solvers due to their design of the product to support SMP and multi-core/multi-threaded processors and a high speed linearly scaling linearized solution for the EM matrix.  Using these methods large data sets (GDSII, GERBER [Cadence, Synopsys, Mentor, Zuken]) can be analyzed for package-on-package, stacked die, TSV, and SIP designs.  The existing version of the product had a 3D Wave solver for noise and EMI, a 3D Quasi-static solver and now adds a new Static and Dynamic 3D solver that is called PhysVolt.  The roadmap for the product will include thermal noise analysis. In addition to the design solver and extractor, there is a near field and far field solver for EMI at the enclosure level incorporating the electronic designs.  The tools are in use at TI and Toshiba as reference accounts, and the product interfaces with most companies “golden simulation and verification” environments.

Silicon Frontline was demonstrating their product that was announced in late May.  Thier 3D solver technology, while having similar speed and performance aspects to that of Physware is completely different and is targeted towards a different set of data.  Their circuit flow is now approved and qualified by TSMC and UMC.  In addition to the GDSII design data, there is a process technology file that is used to help generate the 3D views of the design.  Their product includes a 3D topographical viewer of the design data for reference and ease interpretation of the design.  The RCX product (F3D) and the just R product (R3D),   The resulting netlists that are extracted are compatible with most simulators (circuit level and high capacity) that have been blessed as golden by customers.  The roadmap for their product included additional fab support and electro-thermal model extraction at the device and interconnect level.

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