May 11 2009

Synopsys ICValidator – Next Generation PV

Published by at 12:46 pm under Uncategorized

Synopsys has finally released the long awaited next generation physical verification product to Hercules to address ultra sub-wavelength (45nm and below) process technologies.  The new product is called ICValidator and works as an add-on/integrated product to the ICCompiler product.  There are three (3) areas of major overhaul and change over prior products: (1) The product is natively written to support multi-core, multi-processor and distributed environments, (2) there is a new programming and control language (PXL) and (3) the complete re-architecting of the product to support both polygon AND edge based verification and logical operations and objects.  The change to support both polygon and edge based verification now allows for high throughput of gridless processing of both design data and blockage data.

The updating of the code base from a single core, single process task to a multi-core engine, has several impacts.  Not only is the design data segmented into multiple machines and processors cores but the runset is also distributed.  The new parser can split the runset to work on separate processors although, the algorithm for doing this was not discussed, the Synopsys staff indicated that the multi-generational historic issues of hierarchical data and flat data in combination with common sizing and spacing rules no longer is a problem for the runset splitter which supposedly now results in near linear scalability with processor count.

The ICValidator product is a supplemental licence to existing Hercules licenses for most users who are migrating to the new processes.  The staffing requirement is that the same personnel would be able to support both programming languages as the new PXL language is easier to use, smaller and more compatible with object oriented construction as the other Synopsys programing languages are.  There are training and transition programs being put in place at Synopsys and new runsets should be available from the foundries.

The ICValidator product is designed for use in an interactive flow that is closly tied with the ICCompiler product.  The concept is to create a closed loop “single pass” between the design creation and actual clean design closure.  The loop includes timing aware routing, timing aware ripup-and re-route for drc repair (i.e. fixing PV errors automatically including multi layer edits), full custom editing modifications both manual and automated, PV and DFM as required.  The new flow is targeting the loop happening at the design creation stage of each design module as it is initially created, this making a “correct by construction’ block, and having just a final assembly level “sanity check”, rather than the traditional, complete a full design and then do full hierarchical PV and have to perform, correct and re-validate the entire design due to corrections.  The correction methodology is such that for sub 45nm processes, it is preferred to leave out complex routing constraints such as corner rules from the router, and then have the PV tool flag and repair the error in a smaller area.

The idea to integrate the ICValidator product with ICC as a combined flow tool is interesting.  Either they have new EDA marketing people who do no know past campaigns, the memories are short at Synopsys, they believe the memory of their customers is short, or their optimism is higher for the re-use of the tag line “single pass” from the old Avant! Aquarius and Vericheck flow. The marketing concept is good of a one step solution, however the execution of the old “single pass flow” typically did not come out shorter than mid 2 digits worth of spins per blocks (as compared to 3 digits of spins per blocks with other tool flows) for real chips besides the powerpoint benchmark chip.  This flow with the ICC integration, PV& DFM and autofix seems targeted towards the same fate.

Synopsys is known for bringing out strong technology products that actually perform well in real applications, for real engineers, and making sure they are stable when they are released.  It looks like this is just such a product and in reality will be strongly embraced by both the foundry and the design communities.

It would be beneficial to these communities if the marketing information associated with the products were directed toward real features of the product and how they apply to actual design data (about 20% of the current pitch info) instead hype that is re-tread from the Avant! flow slicks cira 1990′s.

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