Dec 19 2008
Process technology and design – an expanding direction for IEDM ‘08
The IEEE’s Electron Device conference has traditionally focused on advancements in process technology, new devices and the modeling and understanding of how these devices and the process chemistry/physics works. The conference has been and continues to be the main stage for the announcement of new and novel devices, new process migrations, and new analysis techniques to being able to monitor these devices and prepare them for volume manufacturing. Registration and attendance was high in the context of the current economy and industry environment.
The conference has not been a strong hold of circuit design and system application information, except for memory technologies, as that has been covered by other IEEE societies and events. This year’s conference has shifted this trend and full acknowledged the tight coupling of generalized design tradeoffs and process technology for DSM and Nanoscale processes. The conference featured several keynotes on this topic as well as several full sessions. The sessions included: Nanotechnologies for Medicine and Biology, Biosensors and 3D Hetero Integration, and Issues at the Confluence of Technology and Design.
The Medicine and Bio sessions presented information that was very representative of the direction and challenges in this area. With an audience comprised of both design engineers and process technologists, aspects of bringing bio products to production ranged from:
- system segmentation (internal, and external partitioning of hardware, software & UI control)
- system packaging and interconnect technology for multi-chip systems – flexible vs traditionally rigid structures
- Power and temperature constraints – most electronics utilize external power that is replaceable and power issues are bsed on extending battery life. In the Bio interface designs, operating temperature changes in excess of 0.1C are a problem for implantable devices as well as the requirement for passive power coupling to avoid repeated invasive procedures for battery replacement.
- drug delivery options that take advantage of MEMS and Nanowire technologies. These papers presented how to use standard, proven, electronic MEMS processing or Nanowire growth on spheres to create solution options for directed point of treatment. The MEMS product was a series of electronicly controlled reservoir chambers that could programmed for release on a fixed long term program basis. The other paper described standard nanowire creation to make absorption optimized drug delivery spheres.
The Biosensor papers were very circuit and design oriented rather than process technology oriented. There was nice background to the attending audience for the DNA sensitive FETs and the modeling behavior that goes with the design. This session also covered nanowire sensors and 3D assembly techniques including TSVs (Thru Silicon Vias). These assembly techniques and sensor materials are new applications of process technology that was nominally targeted towards multi-chip high density memories.
One of the larger sessions at the conference consisted of ONLY invited papers and focused on Issues at the Confluence of Technology and Design. The first talk , by Professor T. Sakurai from the University of Tokyo focused on technology behind low power design methods, those that are circuit derived and those that are process derived and their impact on potential yield and manufacturability. The premise being only small portions of the design are performance critical while all devices present in the design are power critical.. The second talk, by Professor P. Gupta from UCLA will discuss the use of devices with tunable parameters that can be implemented late in design cycle. The key is to allow for tunability, not redesign, that will help meet production requirements without the need for a full re-characterization cycle. The techniques reviewed included some that are already part of OPC and post processing capability but not part of any standardized flows. The third talk, by Professor A. Strojwas from Carnegie-Mellon University and PDF Solutions, was somewhat contrary to the the second paper, in that it adovcated reduced design rules and as the method for tradeoffs between yield, variability, and robust design. The fourth talk, by Professor A. Asenov from the University of Glasgow, addressed the exponentially increasing area of analysis of variability and its impact on design using statistical simulation techniques to model variability and reliability in highly scaled devices. The last three talks addressed specific application areas and technologies. These talks were by Professor D. Sylvester from the University of Michigan on the design of robust low-power circuits; by Professor K. Makinwa from TU Delft on CMOS temperature sensors; and by Professor M. Horowitz, from Stanford University will focus on the requirements for future devices intended as CMOS replacements.
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