Pallab’s Place

This years NAB show had a strong focus on hardware for content creation and broadcast.  Most of the custom hardware was in the form of encoders/decoders and data transport/storage.  Xilinix not only was displaying thier prototype boards and FPGA products (Virtex 4 and Virtex 5), but they were the predominant component on add-on accelerator boards available from third parties such as Thompson’s Grass Valley Group. Their prototype boards featured the Virtex 5 family of processors ans showed IP that included H.264, MPEG2 and JPEG2000 encoders & decoders and new this year,a 3GB/SDI macro.

Joining Xilinix in the Programmable device area were Mathstar, Altera, and Ambric.  Ambric showed customer applications of thier multicore DSP based architecture arrays.  These were used to make high speed encoders and decoders for both video capture and broadcast.  Thier initial product has 336 instances of a 32 bit DSP style processor.  In order to bring the product to market, they also developed a set of design and development tools that allow the user to create optimized application software.  The product currently has an H.264 and MPEG2 encoder/ decoder set on a reference board.  Thier reference customers have shown results at the level of 1 teraop/sec at 15W performance for fixed point operations.

Telarity was demoing their broadcast encoderr solutions at the event.  The high speed H.264 compliant encoder uses 7 of thier custom processors to operate the product.  The most remarkable feature was the ability for the high relability systems (dual supplies, etc) to start up in only 5 seconds to active broadcast.  Most of the systems of the market have a 30+ second startup time.
 
Sony had both a hardware and software exhibit at the show.  On the hardware side, the new products included tapeless HD cameras, OLED displays, video servers and HD projection & display products.  They were showing a full 4K projection systems with an editing station.  They also showed several large format HD displays for stadiums, houses of worship and scoreboards.  On the advanced technology side, they were showing an add-on high contrast OLED display for HD broadcast and video cameras.  Their video servers were all supporting multiple high speed (GB/s) channels and Petabyte level capacities.  Their new video cameras in the HD format are supporing 4:2:2 capture and data in MPEG2 format at 1080i resolution.  These cameras aer available in a tapeless format using high density memory cards.  Neither Sony, Panasonic or Fuji Film would comment on the soft error rate or data storage and read error rate for these cards.  At typical consumer level error rates, (typically between 1-10 part per billion), it guarantees as least 1 non-correctable error on a 16Gb card, and a high probability on the 2-8Gb products.

On the multicore front, specialty encoders and decoders have started to embrace the architecture.  However, for mainstream video processing software for Non-Linear Editing (NLE) or real time broadcast editing, the software is on its way.  At this time, the only NLE offering is Sony’s Vegas Pro package (multi-core, and 64 bit in Q3 release).  Autodesk supports multi-core processing for their Media and Entertainment modules (Smoke, Flame, Lustre, Maya, etc).  They were showing the product in thier user group event on 8 processor machines and with custom Infiniband servers.

As the format wars settled out, there were a number of companies with Blu-Ray copiers for both high and mid/low volume.  Teac was showing a new system that supported standalone copying/ duplicating of the High Def media.  Primeria also showed several duplicators, with a new sub $3000 Blu-Ray/DVD/CD printer/duplicator that utilizes a 20 disk handler.

In past NAB shows, audion was a small part of the radio broadcast sector.  Now, audio is a major portion of the video capture and playback experience.  The digital theater group, and Dolby lead the way with play back systems.  On the recording side, Holophone of Canada has a number of models of thier 5.1 surround sound microphone pod.  They also supply traditional and camera mountable mixer and multipler solutions for allowing the recording of the surround sound in a standard two channel format.  Most of the NLE tools and the pro-audio tools (from Avid, Sony, Adode) have 5.1 and 7.1 sound processing software. 

A number of new recording devices that have an increased recording quality level were introduced.  In the past, the standard was 16bits at 48KHz.  In the last few years, it has moved up to 24 bits at 96KHz.  Roland introduced two different 4 channel recorders (one hard disk, the other solid state media) that support 24 bit/192KHz data rates.  The unit supporting the SD cards were gangable to a total of 8 channels synchronized.  The hard disk unit is the “Pro” model and include time clock synchronization with a video clock.

A last section that was vistited consisted of test methods, software and hardware.  On the software testing side, eInfocchips has developed a program called Visual Quality Inspector (VQI).  The VQI product provides quantitative metrics for visual quality such as PSNR, SSIM, MSE, and MSAD.  These are normally done manually with a subjective (human) reference.  The product works with all formats of data SD, HD and Custom and has been tested up through full 444 video data. 

Tektronix also has a product for quantifing video images - the PQV500.  This product is targeted at video compression/decompression systems and format translation systems, this is a hardware product.  The balance of the products were hardware for the testing of video for the broadcast industry in SD, the transistion to HD and also to DTV.  Compression verification tools have also be created for MPEG4, MPEG3 and H.264.  Tektronix is also the founding member and coordinator of the Cerify Developer Community which is an industry consortium for video asset management providers and video service providers of all formats.

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In April Xilinx introduced a new high reliability FPGA based on the Virtex 4 family targeted for the Aerospace and Defense industry.  The Virtex 4QV product uses the same developmen software as the commercial version of the product. This gives the high reliability product access to DSP, CPU Cores, memory ineterfaces, and connectivity solutions that have known tested interfaces and functions.

The sofware development environment has special features for the Virtex 4QV family.  The TMRTool helps to auto create Triple Modular Redundant designs (best of, voting logic) for standard deciisions and logic paths.  These tools were developed with Sandia labs and include both error creation and scrubbing for particle (SEE) effects.  The design methods and the parts have been validated by the SEE consortium.  The FPGA is rated at a 300krad TID level, which after a startup space SRAM load, means minimal if any impact from in operation SEE. 

Application blocks that can be implemented and have been tested include: video compression, encoding and decoding, filtering and processing for Radar, AES, 3DEC and other encryption methods, 802.xx packet data processing, and ethernet / fiber channel bus management.  Figure 1 shows a sample functional partitioning for a design using one of the members of the product family.

The product is available in both Ceramic and Plastic packages and both are B, M and V rated for oveperation over the data of -55C to 125C.  The packages range from 640 to 960 pins.  The products are available now and have a legacy of reliability of service from being included on programs such as the Mars Lander, the Mars Rover and TACSAT.

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The keynotes RSA Conference held in San Francisco followed the theme that data Security is no longer an option, it is required.  This was reiterated several times by RSA president Art Coviello who also noted the dialog box pop-up of “Are you sure?” before you submit information is the tech worlds equivalent of the old movie line “Do you feel lucky?”.  A later keynote by Dept of Homeland Security Secretary Michael Chertoff identified today’s threat of cyberspace is on a par with 9/11.  Replays of the conference keynotes are available after registration at the following site:

In a move that emphasizes the direction of security, Hitachi recently purchased the long standing private company M-Tech, now called Hitachi ID.  The M-Tech acquisition fills that gap in their IT and security services offering.  Hitachi is now suited to address customers needing Identity and Asset Management solutions with full product line solution from a single provider.  This software was a needed addition to the wide variety of access control products including RFID and biometrics. The Hitachi ID software solution is currently implemented at over 200,000 users and supports single-core, multi-core and distributed processing environments.  One of the key applications is for SOX compliance reporting and access.

From a hardware perspective, there were lots of FPGA solutions for encryption/decryption of the data streams and authentication for access control.  Typical of the offering is the 10Gb AES softmacro for the Xilinix family of products that is available from Algotronix Ltd.  The IP is being offered on a 60 day/5 FPGA trial basis.  The predominant ID system for access control is still the hardware dongle with either a fixed or changing key.  Biometric ID (thumb, fingerprint, eye scan) were all still present, but were not highlighted as prominently as the software system for backing them up.  Hitachi was displaying their new finger vein scanner which is supposed to be more unique and consistently identifiable than fingerprint scanning.

One area that the software suppliers did not indicate they were addressing is the area of malware, viruses, and software intrusion in multi-core and GPU executable environments.  Shared cache systems attached to multiple core processors that also reference a single memory store have some issues with false flag generation for access control and ID confirmation applications.  At this time, none of the vendors that were asked about this problem had a definitive position on how it was addressing this problem for code installations on legacy software that was created for single core engines.
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The Synopsys User Group held it San Jose event recently. The opening keynote and introduction by Aart de Geus gave the direction for products for the coming year. The talk reviewed the standard speed up of PrimeTime, VCS, ICC, verification and litho sim. These improvement were made in part to support the large shift in the semiconductor community from an IDM model to a fab lite model.

The theme of the conference was the addressing of power usage/reduction as a driving design constraint and multi-power design. A number of the power issues are being addressed by the UPF group that is part of Accellera. Accellera group is also launching a VMM consortium to promote the use and creation of open VMMmodels. The new group is called the VMM Catalyst Program and absent from its current membership are Mentor, Cadence and Magma.

With the smaller process geometries (65nm and below) requiring a reworking of device level design for library elements, Synopsys introduced some major updates of the thier custom device environment. Their device simulators (HSPICE and others) are in the process of being recoded from single processor to multi-core awareness. They also rolled out a new repackaging and reshaping of the one of the old Avanti custom design tools (Cosmos) and have updated it ti work with OA. This new tool is called Orion, and includes schematic capture and custom device generation in addition to full custom layout. They did not memtion an OA to milkiway tramsition for the tool, so the assumption is that it is an OA tool only, and hence is not addressing any historic Analog Artist Applications or designs.

The EDA community and Synopsys interestingly noted that the new processes are driving designers back to device level design. As happens every couple of years, it is “analog’s time” again. The reality is, it may very well be the time that “analog” and device level primitive design is needed, however there are no innovations in tool flows or even new points tools being made in the custom design sector. Simply improving the throughput of an existing tool without a new flow to bring data in or improve the interpretation of result, does not rr real;y fix anything. As a results, the device level simulation at Synopsis is the same but faster than last year.

Once again the PR folks showed their high levels of paranoia by restricting the press to only a few sessions rather than inviting them to the whole event, this leaves the press continuing to hear from only disgruntled users.

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Yes, I’m still among the living.

I’ll be attending NAB next week for Chip Design magazine. Let me know if you want to meet at the show.

Chip Estimate Corp provides a portal and search engine for semiconductor IP that can be used in SOCs and other custom chips.  They additionally provide yield prediction software for the overall design based on the blocks selected.  Today they announced a new free service, that will now bring their product offering to customers on the leading technology edge rather than the leading functional edge.

The semiconductor IP that is listed on their site currently includes standard product macros and IP blocks that are fully characterized and usable for designs based on the process node in questions.  Unfortunately, for companies with complex designs that require multi-year architectural and logic design schedules, the availability of IP for use 12-24 mos out or in a custom configuration, are not listed on the site.  This is due to the fact that these blocks are still in development at the IP providers and/or are not available as standard, full suite characterization due to customization requirements by the end client.

The new IP Concierge service has a simple fill in form that gets sent back to the IP providers that indicates someone is looking of these “under development cells” or a “modification” of a standard block.  The information allows the providers who are at a stage of development to work with an advance partner to “beta develop” the cells with a customer.  This will allow the end products to come out on schedule.  Examples may be high speed SerDes on TSMC 45nm, or WiMax cores on 65nm which are targeted at late 2008 / early 2009 prototypes and production.

According to Adam Traidman, President of Chip Estimate, the service will support the current standard IP providers and the customizable product providers.  In the future, Design Centers, Custom Design Service providers and ASIC suppliers may be included in the services offering.

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The IDF this year had it fair share of excitement - the announcement of the new microprocessor architecture for the multi-core environment, production on advanced processes and power in addition to performance as a metric. Some of the highlights were:

The introduction of the new Nelaham and Penryn processors on the 45nm process node. The new Penryn processors features a shrink of the 65nm cores with higher performance and operating frequency due to the process size reduction. The Nelaham processors are using a new micro-architecture that features a wider dynamic execution block, a smart cache, an improved digital media interface.

The 45nm process node is the first in volume production using a high-K Hafnium + Metal gate devices. This process claims to offer a >2X the transistor budget per area over 65nm. It features a 20% speed improvement and reduced leakage over the current 65nm MOS process node. The 45nm node is done with all optical litho using 193nm sources.

Intel also introduced a 32nm high speed 200MB+ SRAM. The process was created based on a very extensive test module that included the SRAM product, test modules, and standard, but updated, PCM blocks and devices. The 32nm process utilized immersion litho for several key steps of the manufacturing flow, the rest of the stages are standard dry litho. Both the 45nm and 32nm processes utilized a reduced design rule methodology.

There was a mention in the keynote that in addition to the traditional performance scaling that has been taking place for the server and high performance computing environment, that a new initiative to reduce standby and non-active mode power was being implemented. The goal was static and standby power reduction by a factor of 10x in the next 5 years. This goal is set to address the mobile computing, telecommunication and consumer marketplace.

One of the highly anticipated but surprisingly disappointing aspects of the event was the keynote / discussion with Gordon Moore. Dr. Moore is a well respected, highly intelligent, highly productive member and key founder of the modern semiconductor industry. His IDF presentation was mostly about reminiscing about the early days, which were before most of the audience was out of diapers, and very little discussion of opinions and observations that took place along the way. The perception was, that he was being displayed before the crowd like Punxsutawney Phil on Groundhog’s Day, and if we saw his shadow we got 6 more years of optical lithography. The further indignity was the followup of the talk by the give away “Moore’s Law” t-shirts which were being given out if you visited the partner’s forum. If the keynotes and product announcements had no substantive value or innovation, it might have been a good “diversion” for the crowd. However, with the new process technologies and the new architectures and performance goals, the talk just seemed out of place.

Pallab

ASCAP, the song writers and composers association, held their second annual expo on the state of the writing, publishing and recording industry in LA. The event had several tracks and areas of focus.

Of interest to the Chip Design community was the directions in Digital Rights Management and ownership/registration of songs. There were several legal advisor sessions which reviewed the use of digitally sampled content being included in the current songs, and what would be considered copyrightable as new material. The short answer on this is there is a finite amount of notes available in music - creating and recording new performances of existing note combinations may be OK in certain contexts, but you need the council of a professional copyright attorney. The use of home or studio based recording, sampling and modifying existing music and reusing it in new material is definitely a violation of the copyright rules, even if the technology supports it.

The current plan for most of the DRM directions, including electronic based delivery of music, is to NOT have DRM access or subscription information encrypted in the data stream which would have to be decoded for real-time playback. There has been discussion of home entertainment environments wanting to put the DRM encryption hardware in the home server as part of the security accelerator cores. The accelerators can focus on standard video and data com encryption (DES, AES, ARC4, MD5,SHA, RSA, etc) without additional need for audio based crypto solutions.

An interesting exemption to this whole DRM issue, is the DSP based audio generation models (synthesis playback) that are sampled from either real instruments and performers or harmonic models are OK to include in performance material. As a result, using the Garritan Libraries, Cakewalk, the Sony Acid Libraries, Garage Band are all clean solutions for both realtime playback and music creation. Roland was showing both laptop/desktop based library DSP synthesis playback with USB keyboards and a combos with traditional internally generated instrument synthesis from their studio keyboard product line.

On the recording side, the resolution of data converters for home studio recording is approaching that of the studios. The current low/mid end direct digital mixing and capture systems have 24 bit word size and 48kHz sampling rates. High end systems available to the consumer support 24bit @ 96kHz data. Most studio systems are running at 24bit/96kHz to 24bit/256kHz data rates. The main shift in these systems has been the inclusion of the CD direct write control cores along with the multi-channel data converter cores. The current limiting section for single chip integration is the noise floor reduction on the analog muxes for channel selection. The home systems support the 24b/48k data rates at 4 channels of mixed audio (microphone or instrument) input. The summary from the panel discussion with a group of professional recording engineers is that it is OK to record with a home studio, but you need studio equipment and engineers to properly mix audio and then down-sample it for use on portable players.

Along with the electronic and legal side of the show, the people, booths, and events were all interesting and pleasant. The booths had a wide range that extended from conference rooms filled with instruments and displays to a small table with a book and a stack of paper. With these booths were a variety of people from lawyers to successful musicians such as Randy Neuman, Chris Brubeck, Terri Gibbs, and Louie Bellson. Even more musicians were at the opening ASCAP Pop Awards. These included people like Melissa Etheridge. Other events such as the Johnny Mandell Big Band were also live performances, such as with the Randy Neuman, who talked about some of his songs, and also played some of his tunes. They also had early-morning sessions that were early morning jazz panels that had some of the biggest names in jazz, such as Chris Brubeck, Marcus Miller, and Terri Gibbs.

Pallab Chatterjee & Peter Chatterjee

The 2007 CES show continued the electronic ecosystem of BOTH wired and wireless solutions having strong footholds in the design space. The overall public trend towards wireless has not really impacted the high performance world where wires still rule.

On the networking side, the 802.11n space saw the realization of several, sometimes conflicting, interpretations of the draft specification. However, the Gigabit wired world was in full swing with interoperability and long cable lengths. One long awaited wired solution, was the area of power line netwrks. This long awaited technology actually had prototypes on display in various stages of reality. One of the better usability options was the implementation from Dlink which incorporates the 3DES encryption IP engine from DS2 in their 200MBPS product. Having incorporated most of the handshake and data security in the custom chip rather than software, helps not only maintain the data rate through the product but also simplifies the customer learning curve. The IP and the custom chips in this category are being built with current process geometries (90nm180nm) based on the voltage levels involved.

The peripheral industry (cameras, printers, media players, home & car enterainement system control) are the biggest players focusing on wireless. There were a lot of players in this space
but only a few multiple booth suppliers. Intel, NEC, Wisair all had prominent multibooth custom chip representation at the show and also demonstrated actual working data transfer and samechannel / multidevice connectivity. Just about every one of the players were still dealing with small data size (sub 50Mb) data transfer applications. The WiMedia Alliance group which is trying to help promote interoperability between partners in the semiconductor, application, end system and chip development communities and currently has Synopsys in a role of primary spokesman. They identified IP solutions in the 25090nm process nodes, and mentioned that they have also completed 65nm PHY implementations. As the EDA community is not known for “working and playing well with others” it will be interesting to see how they pull the wireless world together.

The big players in the wired world at the show were high performance audio and video. The HDMI side was highlighted by Pericom and Genuum having long drive length (over 30meter) HDMI 1.3 repeater, mux, demux and active cable solutions. These custom chips are supporting greater than 5GHz bandwidth and are targeted ay both the OEM and addon product markets. Most of thePlasma displays were showing HDMI 1.3 from a BluRay source to show off the highcolor mode, while the DLP and LCD folks were showing HDMI 1.2 or 1.1 solution sources and cabling on 25meter cabling lengths. Analogix was the only vendor that I saw, that was able to display custom silicon on the Display Port 1.0 platform running a Direct Drive Monitor at the show that could still operate after a “live POR and reboot” of the system. The technology will be available as product in 2007 and may appear in OEM/IP forms in the future. Both Genuum and Pericom are targetting Display Port product in 2007 after finalization of the 1.1 specification.

The high performance audio guys are sticking with what works and adding new technology tweaks. Tesla has a new active shield cable that uses real power supplies rather than batteries to keep the signal in the cable and shut out interference. In the sound room demo (played into a set of Theil 3.7 speakers), you could hear an audible increase in head room at BOTH the high freq and low end. On the amplifier side, Zetex Semiconductor showed thier new “Class Z” audio amplifier chip. It is targeted at the home audio marketplace with a modified Class D design, specifications of >100db noise floor, and low THD. From a practical side, it is one of first Class D high power amplifier solutions that DOES NOT require it be stuck in an automotive environment where the road noise is needed to remove the audible clocking noise. Parasound continued to have one of the best and cleanest sounds at the show using industry proven bipolar class AB amps, JFET inputs, board designs that are very clean and thermally balanced and absolutely huge, clean power supplies and heat sink systems it is perfecting classic design at its best.

As a final note on the audio side, Music Giant and Monster Cable are insuring there will continue to be high quality content for playback in these systems. Music Giant with the HD Audio campaign is providing 96Khz and 128Khz sampled 20+ bit data for music including classic labels such as Verve so home media systems would have something to play. Monster Cable, in addition to a ton of new home and audio products also launched Monster Music which is a new HD Audio music label (starting with the signing of George Benson as it first artist, and receiving 3 Grammy Award Nominations) that is focusing on the highest performance audio and video content available.

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At the recent NAMM show in Anaheim in January, there was a continuing resurgence of industry proven technology and a peek at directions to come.

The industry proven technology is the solid foothold of class A and class AB amplifiers. These implementation have long been the mainstay of the performance amplifier market for guitars, basses, keyboards, and vocals. One of the growth segments in this market is the vacuum tube amplifier business. Groove Tubes and JJ Electronics (formerly Tesla) both major suppliers of audio vacuum tubes, reported significant increases in orders (>30% AGR last two years). The main amplifier makers (Peavey, Fender, Marshall, Orange) all introduced new tube models this year. Peavey introduced a new small tube amp (the “JSX Mini Colossal”, weighing in at under 23lbs) which is a 05watt 8′inch recording/performance amp that supports a simultaneous full scale XLR output connection that is not affected by the master volume/power control.

The semiconductor community was also present with new high performance monolithic solutions in the professional audio space. One of the chip highlights was the new highCMRR balanced line receivers from THAT Corporation (the 1600 series products). Their new design eliminates the “clipping” that occurs in traditional balanced designs when connected in single ended applications.

On the systems side, there were the standard array of effects pedals and preamps. There was also a new product from Creation Audio Labs that stood out at the show. Their MW1 Studio Tool is a combo function unit whose specifications and features were put together by industry icon engineer/producer Michael Wagener. The product uses active circuitry rather than transformers to implement load and cable isolation and effects isolation/gain. The result is a box that supports multiple outputs to a recoding environment (both instrument direct and gained) without phase shift or distortion and one of the cleanest signal band power supplies that can be found commercially.

On the peeks at directions to come the folks at Cakewalk introduced thier Sonar 6 Producer edition sound/music editing software. This product is architected to take advantage of the new multicore processors from Intel and AMD and do so without any user intervention for configuration. The product in single processor mode works traditionally. In a multicore application, the product identifies the availability and directs new functions and plugins to the available cores in order to maximize throughput. This is one of the few multicore apps available at this time to really use the multicore capability, and is hopefully a glimpse of what is to come with proper reengineering of software.

The last big electronic product direction at the show was the further encroachment of DSP into the analog domain. Line 6 which has been a leader in the DSP implementation of multichannel nonlinear modeling introduced several next generation versions of existing products that now utilize the ADI family of DSPs vs the prior generation