• Blogs

Rick's Wireless Networking

bloggerTools and the Debug Cycle

The efficiency of a development or debug tool needs to be looked at with the perspective on how it effects the debug cycle...

Pallab's Place

bloggerNAB 2008 - Video and new hardware

This years NAB show had a strong focus on hardware for content creation and broadcast.  Most of the custom hardware was in...

JB's Circuit

bloggerThe Truth is Out There...

You know where I'm going with this title, don't you? Yes, it's time again for UFO Fest (check out the video)? Who will meet...

Fahrvergnügen

bloggerCan ASIC verification be fun?

The German word Fahrvergnügen directly translated means “the joy of driving“, and anybody who has ever driven a...

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•OCP-IP Member Guide

OCP-IP MEMBER GUIDE


A Universal Capability to Assert OCP Compliance
The OCP-IP Functional Verification Working Group recently released to members a set of English language compliance checks that for... By Jeroen Vliegen – Chairman OCP-IP Functional Verification Working Group
Native SystemC Checkers Verify OCP-IP Specification Compliance
JEDA is developing verifcation automation tools for SystemC. One of our frst products includes a set of native SystemC assertions ... By Stephen R. Pollock, VP, Marketing and Sales, JEDA Technologies
OCP-IP Key to Design Reuse and Ease of Integration
capabilities. Eighteen month cycles have given way to 12 month and even 6 month cycles. To make matters worse, costs can drop dram... By Chuck Schalm, Director of Sales and Marketing at Jetstream Media Technologies
Sonics SMART Interconnects Meet the Challenges of Convergence SoC Design
The synergistic mix of multimedia and communications with Moore’s law has led to interesting challenges for SoC designers. A... By Jeff Haight – Director of Technical Marketing Sonics Inc.
Verification Components and Open Protocols: A win-win scenario for the design of modern electronic systems
The interaction between sub-components is critical (digital but also analogue) and is the major bottleneck in modern electronic sy... By Riccardo Mariani – Chief Technology Offcer, Yogitech
OCP System Level Design Working Group
Over the last few years Transaction Level Modeling has established itself as a valuable strategy to solve system-level design prob... By Anssi Haverinen – Chairman, OCP-IP System Level Design Working Group.

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