Blogs

JB's Circuit

bloggerReader Wants Print, not Links

How do the readers of Chip Design - mostly engineers if one believes the polls - prefer to receive editorial content? Print...

Verification Vertigo

bloggerGuest Blog: Limor Fix – Verification session at DAC

Limor Fix writes: I am very proud of DAC’s program this year. As usual, the program is so rich that it is impossible to...

EDA Thoughts

bloggerMy List of DAC Exhibitors

I'll be visiting the following list of EDA companies at DAC this year and writing what I learn about each one: ACCIT...

Domeika's Dilemma

bloggerMulticore in the Age of the Unthinkable

Recently, I had the opportunity to read and finish in one weekend, ‘The Age of the Unthinkable’, by Joshua Cooper Ramo...

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•OCP-IP Member Guide

OCP-IP MEMBER GUIDE


A Universal Capability to Assert OCP Compliance
The OCP-IP Functional Verification Working Group recently released to members a set of English language compliance checks that for... By Jeroen Vliegen – Chairman OCP-IP Functional Verification Working Group
Native SystemC Checkers Verify OCP-IP Specification Compliance
JEDA is developing verifcation automation tools for SystemC. One of our frst products includes a set of native SystemC assertions ... By Stephen R. Pollock, VP, Marketing and Sales, JEDA Technologies
OCP-IP Key to Design Reuse and Ease of Integration
capabilities. Eighteen month cycles have given way to 12 month and even 6 month cycles. To make matters worse, costs can drop dram... By Chuck Schalm, Director of Sales and Marketing at Jetstream Media Technologies
Sonics SMART Interconnects Meet the Challenges of Convergence SoC Design
The synergistic mix of multimedia and communications with Moore’s law has led to interesting challenges for SoC designers. A... By Jeff Haight – Director of Technical Marketing Sonics Inc.
Verification Components and Open Protocols: A win-win scenario for the design of modern electronic systems
The interaction between sub-components is critical (digital but also analogue) and is the major bottleneck in modern electronic sy... By Riccardo Mariani – Chief Technology Offcer, Yogitech
OCP System Level Design Working Group
Over the last few years Transaction Level Modeling has established itself as a valuable strategy to solve system-level design prob... By Anssi Haverinen – Chairman, OCP-IP System Level Design Working Group.

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