Taken for Granted

ESL, embedded processors, and more

Day 4 and 5 of DAC 2010: SOC Enablement, High-Level Synthesis and Heterogeneous Systems

Filed under: Uncategorized — June 20, 2010 @ 12:53 pm

On Thursday June 17, DAC had a special set of sessions labelled “Embedded/SOC Enablement Day”, with talks from a variety of people from a variety of companies talking about their strategies and tradeoff choices for complex SOCs, usually in embedded systems. This included a keynote by Gadi Singer of Intel. As I reported in my note on Tuesday, the “P-word” (Platform, and Platform-based-design) have returned with a vengeance.  This was noticeable in the talks by Gadi Singer (Intel), Yervant Zorian (Virage Logic), John Bruggeman (Cadence – and a passionate speaker about EDA 360 – this was the first time I had seen him talk), Ivo Bolsens (Xilinx), Shauh-Teh Juang (TSMC)  and Rob Aitken (ARM).   Ten Years After (well, maybe eleven or twelve) and the design approach we observed, and predicted would become ubiquitous, has indeed become accepted and ubiquitous.

Later that day I attended the Panel Discussion on “What Input Language is the best choice for High-Level Synthesis (HLS)?”   No real surprises here, with 5 of 6 panelists being from the C/C++/SystemC camp and one being from Bluespec (Rishiyur Nikhil), that C and its variants was the preference advocated by the majority of the panelists.  Dan Gajski of UC Irvine had tried with some pre-questioning of the panelists and summarising their responses along various lines, to get some reasons for their preferences (features and capabilities).   As someone a little biased to C/C++ with selective use of SystemC where necessary to express some communications aspects of systems, the idea of teaching designers a new language, as with Bluespec (perhaps better described as a new semantic expressed in extensions to SystemVerilog) is less appealing from a practical point of view.  Although, looking at reference code, as I asked the panelists, one wonders about the level of teaching required for the “older” languages, as much of it can be very poorly written.   It seems inevitable that C/C++/SystemC and combinations thereof will continue to be the mainstream input form for the considerable future.

On the last day of DAC (Friday), I was part of a tutorial on “SystemC for Holistic System Design with Digital Hardware, Analog Hardware, and Software”, talking about Application-Specific Instruction set Processor design (ASIPs) using Tensilica as an example, hardware-software tradeoffs in this style of design, and how via SystemC-based system models, it fits into modelling higher level heterogeneous systems.   My fellow tutorial instructors talked about analogue and mixed-signal design and verification using system-level modelling approaches.   It seemed a fitting end to what overall I think must be judged a successful DAC and one that reflected some recovery in the electronic design industry.   I see DAC has released their preliminary attendance figures which seemed a little up on last year, at least in several categories.

1 Comment »

  1. SKMurphy » DAC 2010 Blog Coverage Roundup:

    [...] Grant Martin “Day 4 and 5 of DAC 2010: SOC Enablement, High-Level Synthesis and Heterogeneous Systems“ [...]

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