Taken for Granted

ESL, embedded processors, and more

Filling out your DAC dance card

Filed under: Uncategorized — May 9, 2008 @ 7:37 pm

The upcoming Design Automation Conference, June 8-13, in Anaheim, California, will be a good chance for people to catch up with what is going on in the ESL and processor-based design areas. My dance card is beginning to get full, and like all good conferences, there is so much going on in parallel that it’s impossible to get to everything of interest. Before listing things of interest, I will mention that I have been involved in helping to organise some of these events or will participate in them. And with so much going on, I can only touch on some highlights.

Edgar Degas, Rehearsal of a Ballet on Stage

In the processor-centric design area, there is the co-located Symposium on Application-Specific Processors to be held June 8-9. On Tuesday June 10 there are technical sessons on Novel techniques in embedded processor design, a pavilion panel on Multi-processor SoCs: the next generation, and a technical panel on Multi-core SoC Design is the Challenge: what is the solution? On Thursday June 12 is a session on Multi-core Design Tools and Architectures.

In the ESL domain, as one might expect at DAC, there is much more going on. Sunday full-day workshops include the 5th International UML for SoC design workshop, and one surveying High-level synthesis. A North American SystemC users group meeting runs from 4-7 pm. Monday June 9 has an OSCI event at lunchtime, an OSCI Overview of TLM 2.0 in the afternoon, and a SPIRIT general meeting in the evening. On Tuesday June 10 we have a panel on ESL Hand-off: Fact or EDA Fiction. Wednesday and Thursday have many things going on – June 11 a lunchtime Mentor ESL symposium, a pavilion panel on Behavioural Synthesis, and a session on ESL methodologies for Platform based synthesis. One of the last sessions on Thursday is one on Design Space exploration, and the Thursday keynote is by Jack Little of the Mathworks offering “a different perspective on System Design”.

On the IP front there is a Pavilion panel Tuesday on IP Selection, and an interesting breakfast IP roundtable sponsored by Sidense on Wednesday morning at 8-9:30 am.

With all this, I have barely scratched the surface of the 45th. DAC. There are many more keynotes, panels, technical sessions, workshops, tutorials, special events dealing with all aspects of EDA and ESL, that you will find of interest. I hope to see you there. If you have other suggestions of other interesting sessions and events at DAC, please leave a comment here for all to read.

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