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Pallab's Place

bloggerCadence Services Formally Addressing the SaaS Model

The service business at Cadence has been steadily operating at over a $100M/yr run rate.  Their services group has been in...

JB's Circuit

bloggerReader Wants Print, not Links

How do the readers of Chip Design - mostly engineers if one believes the polls - prefer to receive editorial content? Print...

Tuning into Jim

bloggerHow Low Can We Go?

In an article this week in one of the industry trade publications, an iSuppli source was quoted as saying, “The usable...

Wizards of Microwave

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Dot.Org

 DOT.ORG

Model OCP Interfaces in SystemC

Standards are being built on top of OSCI’s TLM-2 technology. [ Published in April / May 2009 issue of Chip Design Magazine ]

Industry Standards Should Facilitate Multicore Adoption

[ Published in January / February 2009 issue of Chip Design Magazine ]

GSA Mixed-Signal/RF Subcommittee Is Facilitating an Analog Ecosystem

[ Published in October / November 2008 issue of Chip Design Magazine ]

[Dot.org] The Second Commandment for Effective Standards

[ Published in April/May 2008 issue of Chip Design Magazine ]

[DOT.ORG] Margin Myopia Blurs Chip Supply-Chain Future

[ Published in March 2008 issue of Chip Design Magazine ]

[Dot.org] Debug Grows Increasingly Critical

[ Published in January/February 2008 issue of Chip Design Magazine ]

[ Dot.Org ] Kick-Starting RTL Power-Aware Verification

[ Published in October/November 2007 issue of Chip Design Magazine ]

[ Dot.Org ] The Unified Power Format -- A Standard Done the Right Way

[ Published in August/September 2007 issue of Chip Design Magazine ]

[ Dot.Org ] Integration and Power Highlight Latest Standards

[ Published in June/July 2007 issue of Chip Design Magazine ]

[ Dot.Org ] Power To The People

Power.org Grows with Major Players [ Published in April/May 2007 issue of Chip Design Magazine ]

[ Dot.Org ] EDA Standards: Have We Learned Our Lessons?

[ Published in February/March 2007 issue of Chip Design Magazine ]

[ Dot.Org ] In Search of the Holy Grail: Making Chips Cost Effective, Power Efficient, and Faster

[ Published in December 2006/January 2007 issue of Chip Design Magazine ]

Time To Market Drives SoC Design To Higher Levels Of Abstraction

[ Published in October/November 2006 issue of Chip Design Magazine ]

DOT.ORG: SystemVerilog: The Front Wave of Success

[ Published in June/July 2006 issue of Chip Design Magazine ]

DOT.ORG: Introducing CEDA: An Organization for the CAD Community

[ Published in April/May 2006 issue of Chip Design Magazine ]

DOT.ORG:   Security: It's Not Just Encryption

[ Published in February/March 2006 issue of Chip Design Magazine ]

It's Been A Busy Year for EDA and Semicon Organizations

[ Published in December 2005/January 2006 issue of Chip Design Magazine ]

Aggregation Drives Successful IP Reuse

By helping IP providers and integrators assess IP quality, aggregators can ensure reusability while minimizing customer modification for different chips. [ Published in Aug / Sept 2005 issue of Chip Design Magazine ]

IP Reuse Gets a Reality Check

The selection and packaging of IP have been significantly improved with the VSIA's "apples-to-apples" Quality IP metric. [ Published in June / July 2005 issue of Chip Design Magazine ]

SPIRIT: Structure for Packaging, Integrating, and Re-Using IP within Tool Flows

By looking to quickly produce usable IP-integration standards for SoC development, this organization has achieved many of its original goals. [ Published in April / May 2005 issue of Chip Design Magazine ]

Si2: Innovation Through Collaboration

Flexibility is showing the organization a new way to help EDA and semiconductor companies address [ Published in December / January 2005 issue of Chip Design Magazine ]

PCI-SIG: Several Years of Innovation

Both 2003 and 2004 are proving to be prolific years for the organization [ Published in October/November 2004 issue of Chip Design Magazine ]

Dot.Org--The Metrics of Success

[ Published in July/July 2004 issue of Chip Design Magazine ]

Dot.Org--Open Core Protocol: The SystemC Models

The System Level Design Working Group producestransactional models for the OCP 2.0 specification [ Published in April/May 2004 issue of Chip Design Magazine ]

Dot.Org--Addressing the IP Quality Problem

FSA and VSIA link hands to tackle the issue [ Published in February/March 2004 issue of Chip Design Magazine ]

Dot.Org--A Fresh Look at the New Si2

Working to generate standards that add value to the industry. [ Published in December/January 2004 issue of Chip Design Magazine ]

Dot.Org--Quality IP [QIP]

VSIA releases a tool to quantify [ Published in October/November 2003 issue of Chip Design Magazine ]
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