Welcome to Wireless Chip Designer – the only newsletter that covers the challenges of integrating analog design, analog mixed signal and Wireless functionality into silicon.

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This Month's Table of Contents:

1. IP Is An Industry
2. IP Convergence A Tough Sell?
3. Industry's First USB Subsystem IP Delivered
4. A/MS Verification Tool Solution Boasts New Level of Accuracy/Performance
5. High-Performance 32-bit Processor Now Available
6. OCP-IP Standardizes on Synopsys' Designware Verification IP
7. Semiconductor Design Center Opens in India
8. Companies Partner to Establish New Mixed-Signal RFIC Design Service Lab
9. In-Depth Coverage Links
• IP Trends: Core-Processor IP Market Prepares for Rapid Growth
• Third-Party IP - Curse or Blessing to SoC Development
10. New Books
11. Surveys
12. Happenings -- Conferences

 Sponsors:
   >> Platinum Sponsor: Cadence
   >> Gold Sponsor: Lightspeed
   >> Silver Sponsor: True Circuits
   >> Bronze Sponsor: Eve

1. Viewpoint – Exclusive

IP is an Industry

By Michael Kaskowitz, Senior Vice President, Semiconductor IP Division, MOSAID, www.mosaid.com

The debate regarding the inclusion of semiconductor IP sales into the EDA industry numbers is continuing in the media. A few pundits say IP should be included in EDA, more than a few say no. EDA companies that sell IP with tools say yes and pure IP companies say...Well, they haven't said anything...until now. MOSAID is and always has been an IP company. And we say: "No - IP is not EDA". Here's why:

EDA is very expensive software to create, analyze, and implement semiconductor designs. IP is semiconductor design. EDA helps designers create content but IP is content created by designers. That the IP segment came out of EDA is not in question, but whether it continues to be part of that industry is very much in question. Judging from the comments made at the last Kaufman award dinner, EDA leadership harbors no small resentment to its customer base. It stumbles in the area of true innovation and continually finds ways to repackage old technology as something new, merely to find a way to squeeze a bit more revenue out of a broken product. For example, well-known EDA industry analyst Gary Smith caught no small amount of grief when he stated in 2003 in an EE Times Article that Cadence's workhorse, Dracula, was irreparably broken. Cadence put some effort into fixing some of the flaws, Smith admits, but it's widely acknowledged in industry reviews that it still doesn't work as it is supposed to. Yet Cadence continues to sell it. Full Story >>

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2. News

IP Convergence A Tough Sell?

According to In-Stat, a large percentage of IT budget managers do not delineate many recent technologies and IT trends in their budgets, making it more difficult for vendors and providers to sell newer services such as IP convergence and VoIP. Regardless of the complexity and the rate of change business is undergoing, budget managers have yet to make wholesale corresponding changes to how they budget for and categorize network products and services. As Jeff Jernigan, In-Stat analyst points out "Despite the buzz around convergence and its growing importance to companies, this absence of budgeting precision creates a challenge for vendors and service providers selling into a company that coordinates through a budgeting decision-maker." Recent research by In-Stat also found that:

• Across all sizes of business, implementing IP convergence/VoIP is among the highest telecom priorities in 2007.
• The drive in demand for IP solutions will drive the need for managed and hosted services—especially in small and mid-sized businesses.
• The drive in demand for IP solutions will also drive the need for VoIP security solutions across all sizes of business.

Lightspeed Logic's mask reconfigurable foundation IP enables flexibility, rapid time-to-market, reduced development expense and increased deep-submicron yield.

Lightspeed

3. News

Industry's First USB Subsystem IP Delivered

Mentor Graphics has announced a technology launch of subsystem intellectual property (IP), beginning with the industry's first USB subsystem solution from a single-source EDA provider. Mentor Graphics is the only EDA company to develops its own digital controller, hardware PHY (physical layer), and embedded software IP to deliver an integrated and verified IP solution for today's complex electronics designs. The end result is faster design creation, improved overall product quality, and faster time-to- market, with particular benefit for the high-demand consumer electronics market.
Mentor Graphics >> www.mentor.com

True Circuits offers a complete family of PLLs and DLLs

Our clock generator, deskew, low-bandwidth, spread-spectrum and high resolution PLLs and DDR DLLs are high-quality, low-jitter, silicon-proven hard macros. They are available for immediate delivery in a range of frequencies, multiplication factors, sizes and functions in TSMC, UMC and CHRT processes from 0.18um to 65nm. Call (650) 949-3400 or visit the timing experts at http://www.truecircuits.com/cd3.

4. News

A/MS Verification Tool Boasts New Level of Accuracy/Performance

Synopsys has recently released Discovery AMS 2007, a comprehensive, integrated analog and mixed-signal (AMS) verification solution for complex system-on-chip (SoC) designs. Discovery AMS 2007 features three new components—next-generation FastSPICE simulation technology, a new unified AMS debug and visualization environment, and tight integration with Synopsys' VCS digital verification solution - that build on Synopsys' HSIM and NanoSim FastSPICE simulators. These enhancements address the critical need for a mixed-signal verification solution that can achieve "out-of- the-box" SPICE accuracy while maintaining FastSPICE performance and capacity.
Synopsys >> www.synopsys.com

5. News

High-Performance 32-bit Processor Now Available

Actel Corporation has announced the availability of its implementation of the ARM Cortex-M1 processor - a small, high-performance, 32-bit soft core co-developed by the companies for optimal use in field-programmable gate arrays (FPGAs). Removing the license and royalty fees typically associated with licensing models for industry-leading processor cores, Actel offers free access to advanced ARM processor technology to the broad marketplace. The free delivery of the Cortex-M1 processor for use in Actel's flash- based, M1-enabled Actel Fusion and ProASIC3 FPGAs provides system designers programmable flexibility and system-level integration, enabling the development of low- cost, high-performance systems.
Actel Corporation >> www.actel.com
ARM >> www.arm.com

EVE OUTPERFORMS ALL VERIFICATION ALTERNATIVES

Discover EVE's Exhaustive Verification Environment. Acceleration, Emulation, Prototyping. One vendor, one support organization. Accelerate simulation up to 100x. Accelerate emulation up to 20MHz. Prototype up to 200MHz. Validate software before tapeout.

Find out why 8 of the world-s top 10 semiconductor companies depend on EVE. Click for a FREE whitepaper.

6. News

OCP-IP Standardizes on Synopsys' Designware Verification IP

Synopsys and Open Core Protocol International Partnership (OCP-IP), an independent non-profit semiconductor industry consortium, are collaborating to provide Synopsys' DesignWare Verification IP (VIP) as part of OCP-IP's CoreCreator verification toolset. DesignWare VIP for OCP, part of Synopsys' portfolio of standards-based verification IP, will become the OCP-IP endorsed verification IP solution and will replace the OCP Bus Functional Models (BFM) currently provided with OCP's CoreCreator tool. The new, combined solution, which includes DesignWare VIP and CoreCreator's performance analysis, protocol checking, and transaction disassembly, gives OCP-IP members a common verification toolset, enabling maximum consistency and interoperability across OCP implementations. The collaboration also further expands OCP-IP's robust thriving infrastructure.

The Synopsys DesignWare VIP for OCP will be available to OCP-IP members on request from the OCP-IP website as part of their subscription entitlement. Each release of the DesignWare VIP will be verified by OCP-IP for compliance to the latest version of the OCP standard.
Open Core Protocol International Partnership >> www.ocpip.org
Synopsys >> www.synopsys.com

7. International News

Semiconductor Design Center Opens in India

Freescale Semiconductor inaugurated its new 300,000-square-foot semiconductor design center in Noida as part of its ongoing expansion plans for India. Over the past two years the company has significantly increased hiring in India, acquired two new campuses and invested about $50 million in its India operations. Freescale's Noida campus houses nearly 700 employees and focuses on System-on-Chip (SoC) integration and intellectual property (IP) design. Last year the company opened a new 100,000-square-foot software design center and sales office in Bangalore. This center employs more than 250 engineers focused on advanced technologies in the wireless and networking markets. Freescale's India design centers support all three of Freescale's business groups, playing a key role in providing critical hardware and software expertise to next-generation wireless, networking, consumer, multimedia and automotive applications.
Freescale Semiconductor >> www.freescale.com

8. International News

Companies Partner to Establish New Mixed-Signal RFIC Design Service Lab

Semiconductor Manufacturing International Corporation (SMIC) and Cascade Microtech today jointly announced a partnership to provide RF design engineers in Shanghai, China with immediate access to state-of-the-art RF wafer-level test services for the development of advanced RFICs. With this collaboration, RF designers in greater China will have access to the latest wafer-level RF testing technology at the SMIC design service lab in Shanghai. The lab will be equipped with high-performance, high-frequency measurement instrumentation, including Cascade Microtech's S300 300-mm probe station and M150 150-mm probe station, plus state-of-the-art RF probes. The probe stations are coupled with Agilent Technology's PNA Series vector network analyzer which is capable of handling 300-mm wafers with frequencies up to 40 GHz. The lab will enable research groups to perform precise electrical measurements on ICs directly on-wafer and will be fully supported by applications personnel. As part of their joint effort, both companies will offer application training and workshops.
Cascade Microtech >> www.cascademicrotech.com
SMIC >> www.smics.com

9. In-Depth Coverage Links

There was a time when designing a new CPU was a heroic act worthy of a bestselling book. (Remember the 1980s' Soul of a New Machine?) Today, however, the soul of CPU design is IP licensing and the two chief licensors: ARM Holdings and MIPS Technologies. Both firms are destined for rapid growth. To learn more, read "IP Trends: Core-Processor IP Market Prepares for Rapid Growth."
Chip Design Editorial Feature >>
www.chipdesignmag.com/display.php?articleId=1159

For successful SoC development, it is imperative that we begin to think of third-party IP in a new light. Not only must we redefine "quality" IP, but we must also open our thinking to the development and adoption of a fully integrated IP sub-system. To learn more, read: "Third-Party IP - Curse or Blessing to SoC Development?"
iDesign Editorial Feature >>
www.chipdesignmag.com/display.php?articleId=1198

11. New Books

Antennas For Portable Devices
By: Zhi Ning Che
ISBN: 978-0-470-03073-8
Publisher: Wiley Press

This book provides a complete and cutting-edge guide to the design and engineering of small antennas for portable electronic devices such as mobile phone handsets, laptop computers, RFID (radio frequency identification), microwave thermal therapies devices, wearable devices, and UWB (ultra-wideband) based consumer devices. It addresses practical engineering issues that antenna professionals have to deal with and explains the immediate demands for existing systems. It also discusses the antenna technology for the latest and emerging applications and gives comprehensive coverage of hot topics in the wireless industry. Issues including design considerations, engineering design, measurement setup and methodology, and practical applications are all covered in depth.
Wiley Press >> www.wiley.com

10. Surveys

• Best in Class organizations are 50% more likely than average companies to use design for manufacturability (DFM) tools in all phases of development.
• Best in Class firms are almost 40% more likely to be using advanced verification software than other companies.
• Best in Class performers are three times more likely than laggards to integrate design processes across departments.

11. Happenings – Conferences

The Austin Conference on Integrated Systems and Circuits
May 13-15, 2007
Austin, TX
www.acisc.org

Computerworld's 5th Annual Mobile & Wireless World Conference
May 21-23, 2007
Orlando, FL
www.mwwusa.com

WOC 2007 Wireless and Optical Communications Conference
May 30–June 1, 2007
Montreal, Quebec, Canada
www.iasted.org/conferences/home-565.html

IEEE MTT-S International Microwave Symposium 2007
June 3-8, 2007
Honolulu, Hawaii
www.ims2007.org

Design Automation Conference (DAC)
June 4-8, 2007
San Diego, CA
www.dac.com/44th/index.html

Semicon West 2007
July 16-20, 2007
San Francisco, CA
www.wps2a.semi.org/wps/portal/_pagr/123/_pa.123/302

Semicon Taiwan 2007
September 12-14, 2007
Taipei, Taiwan
www.wps2a.semi.org/wps/portal/_pagr/125/_pa.125/617

Embedded Systems Conference
September 18-21, 2007
Boston, MA
www.embedded.com/esc/boston

SMTA International
October 7-11, 2007
Orlando, FL
www.smta.org/smtai/index.cfm

WIRELESS CHIP DESIGNER e-NEWSLETTER CONTACTS

Editor: Cheryl Ajluni, cajluni@extensionmedia.com

Editorial Director: John Blyler, jblyler@extensionmedia.com

Advertising/Sponsorship Opportunities: Karen Popp, kpopp@extensionmedia.com

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