NAB 2008 - Video and new hardware
This years NAB show had a strong focus on hardware for content creation and broadcast. Most of the custom hardware was in...
The Truth is Out There...
You know where I'm going with this title, don't you? Yes, it's time again for UFO Fest (check out the video)? Who will meet...
Can ASIC verification be fun?
The German word Fahrvergnügen directly translated means “the joy of driving“, and anybody who has ever driven a...
Filling out your DAC dance card
The upcoming Design Automation Conference, June 8-13, in Anaheim, California, will be a good chance for people to catch up...
CADENCE INTEROPERABILITY GUIDE
As the electronics industry moves toward advanced CMOS process geometries at 65nm and below, considerable power management challenges have emerged that cannot be met by a desig ...
By: Susan Runowicz-Smith, Group Director, Cadence Design Systems, Power Forward InitiativeAMIQ
Sentinel: Power, Noise, Reliability Platform for Chip-Package-System Co-DesignApache Design Solutions
ENOVIA Synchronicity DesignSync DFIIIDassault Systèmes
eInfochips releases highly configurable, URM compliant HDMI UVC for verification of HDMI compliant deviceseinfochips
SoCVerify Kit by HDL Design HouseHDL Design House
Hummingbird®: Pushing the Limits of Cadence Applications and Exceed UsersHummingbird
MunEDA WiCkeD™: Improve Design Performance and YieldMunEDA
EDAConnect-SiPPerception Software
PLDA - Premier PCIe IP Products featuring Support for Cadence ToolsPLDA
Semiconductor IP SolutionsVirage Logic Corporation