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 CHIP DESIGN BUYERS GUIDE 2008

Welcome to the 2008 Chip Design Buyers' Guide!

A comprehensive directory of vendors providing IP, EDA tools, hardware, software, services and more!

Browse by Category:

CAD-CAM
	— Design-for-Manufacturing (DFM)
	— Design-for-Test (DFT)
	— Design-for-Yield (DFY)
	— Extraction - Parasitics
	— Floorplaning
	— Layout
	— RET
DESIGN TOOLS
	— Algorithm-level
	— Analog Mixed Signal (AMS)
	— Co-Design
	— Data Management
	— Electronic-System Level (ESL)
	— Hardware Design Language (HDL)
	— Modeling
	— Power Analysis
	— Power Design
	— Prototyping
	— Register Transfer Level (RTL)
	— RF-Wireless
	— Schematic
	— Simulation
	— Synthesis
	— Virtual Prototyping
INTELLECTUAL PROPERTY
	— Cores
	— Hard IP
	— IDMs
	— Interface IP
	— IP Integration
	— Libraries
	— Memory IP
	— Silicon IP
	— Soft IP
	— Software IP
	— Verification IP
INTEROPERABILITY TOOLS
	— Data Interoperability
	— Distributed Development
	— Standards
PCB
	— Design
	— Layout
	— Modeling
	— Simulation
	— Test
	— Verification
PROGRAMABLE HARDWARE
	— FPGA - ASIC Prototyping
	— FPGA - Design tools
	— FPGA - Verification tools
	— FPGA Boards
	— Programmable Fabrics
	— Structured ASICs
SEMICONDUCTOR
	— ASIC-ASSP
	— Fabless
	— Foundry
	— FPGA
	— IDMs
	— Memory
	— Power Verification
	— RFIC
	— SOC
	— Structured ASIC
	— Structured ASICs
SOFTWARE
	— Application
	— Drivers
	— Protocol
TESTERS - HARDWARE
	— Automated Test Equipment (ATE)
	— Emulators
THIRD PARTY CONSULTANTS
VERIFICATION-CHIP
	— Acceleration
	— Co-Verification
	— Debugging
	— Emulation
	— Formal Techniques
	— Hardware Verification Language (HVL)
	— Power Verification
	— Prototyping
	— Simulation
	— Testbench

Chips - ASIC and ASSP Low Power IP Design, Verification, Integration DFM-DFY-Verification Electronic System Level (ESL) SOC Interfaces

Memory Programmable Logic Analog/Mixed Signal Chip-Package-Board Emerging Technologies

Find detailed information about thousands of commerically available IP blocks from more than 230 suppliers

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FPGA Developer

IP Designer & Integrator

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• IP Solutions Resource Catalog
• Valuable Resources
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  • [DOT.ORG] Margin Myopia Blurs Chip Supply-Chain Future
  • [Dot.org] Debug Grows Increasingly Critical
  • [ Dot.Org ] Kick-Starting RTL Power-Aware Verification

Click here for more...

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