Chipnastics – The Art of High Performance Chip Design
Next-Generation Xeon processors trim system power through integration
The just-announced next-generation Xeon CPU offerings from Intel provide designers with a choice of a single, dual, or quad processor chips with integrated memory controllers and a 16-lane PCIe 2.0 I/O controller. These new processors, internally referred to as Jasper Forrest, use Intel’s latest Nehalem architecture and are implemented in the company’s 45-nm high-k metal-gate process. Software compatible with previous-generation Xeon processors are targeted at embedded applications such as communications and storage systems.
The lowest power single-core member of the CPU family has a 23 to 30 W power envelope, while the dual-core versions range from 35 to 65 W depending on clock speed and other features. At the high end of the new family, the quad-core versions consume from 45 to 85 W. At the system level, these power ratings represent a savings of approximately 27 W vs previous system implementations employing the Xeon 5500 processor and a separate chipset that incorporates the memory and PCIe controller. Thus, system solutions based on the Jasper Forest deliver some of the highest performance per Watt of any Xeon platform to date. (The comparison is based on systems using two Jasper Forest processors at 2.13 GHz with a 60 W power envelope and a 3240 (Ibex Peak) chipset, vs two Xeon L5528 processors at 2.13 GHz with a 60-W power envelope along with a 5520 chipset.)
In addition to the integrated memory controller, the Jasper Forest processors also integrate a PCIe 2.0 I/O hub which allows systems to perform non-transparent bridging, and the Crystal-Beach direct-memory-access control, which accelerates RAID access requests. The non-transparent bridging allows multiple systems to seamlessly connect over a PCIe link, which eliminates the need for an external PCIe switch. The 3420 chipset rounds out the system, providing USB, high-definition audio, external SATA storage support, PCI and PCIexpress interfaces, a Gigabit LAN controller, power management logic, and many other support functions.
The processors are expected to be available in early 2010 and come with a guaranteed seven-year lifecycle support program, which should make them attractive for systems that have long lifecycles such as in telecommunications, military, security, network infrastructure, and storage.
Semiconductor Technology Editor