Interesting product developments at DAC

Dave Bursky

Many interesting IP and design verification announcements were one of the key topics running through this year’s Design Automation Conference. Several IP announcements from CAST Inc., for example, offer solutions in video decoding, graphics acceleration, and image decoding. Although developed by the Fraunhofer Henrich Hertz Institute, a H.265 HVEC decoder core is now available from CAST, and it is the first in a series of high-efficiency video coding cores that CAST will offer. The core implements the MPI-D main profile intra HVEC decoding and will be available in the third quarter of this year. The decoder design makes clever use of internal and external memory and its application-specific internal memory architecture enables the core to reuse already fetched data, thus reducing the number of memory fetches. Fewer fetches give more memory bus bandwidth back to the CPU, while at the same time reducing the power needed by the core.

Another core offered by CAST that was developed by IP partner Think Silicon, saves energy in graphics applications by offloading a GPU or a CPU that does not include GPU support. The Think2.5D graphics accelerator is a rendering engine that accelerates two-dimensional graphics functions and pseudo three-dimensional effects such as reflected and shadowed icons. The engine significantly offloads a system’s GPU, performing the calculations at a reduced power level. And for systems without a GPU, the core can offload the host CPU and accelerate the calculations, providing a “snappier” feel to the screen operations –and at lower power consumption levels. Also available from CAST is a graphics processing unit that was also created by Think Silicon. The ThinkVG core supports the Khronos Group OpenVG 1.1 standard, and CAST claims it is one of the smallest and lowest power GPU cores available. Inside the core is a floating-point SIMD streaming engine specifically designed for graphics applications (Vshader) plus graphic accelerators for the blending, rasterization, and texture-mapping functions.

For still images, Alma Technologies, another CAST partner developed a 12-bit extended-resolution JPEG decoder, the JPEG-D-X, that CAST supports. The core supports applications requiring images with greater dynamic range, such as in medical imaging and machine vision. Able to decode static images or motion JPEG streams compressed in Baseline or Extended JPEG formats with 8-or 12-bits per sample precision. The decoder complements the company’s previously-release 12-bit JPEG encoder, and provides efficient, low-latency decompression do deep color images and video with a tiny silicon footprint and low power consumption.

It’s not often tool vendors will offer a free version of one of their new tools, but Agnisys has done just that – free versions of DVinsight, a correct-by-construction tool for design and verification applications. The tool is an integrated development environment for he development of Universal Verification Methodology (UVM) based System Verilog (SV) design verification (DV) code. DVinsight ensures compliance with best practices in using UVM while adhering to established standards. The tool provides on-the-fly checks and guides for creating SV/UVM code, provides auto code completion, context-based hints and includes many built-in rules to ensure correct-by-construction DV code development.

Another newcomer in the DV space is SmartDV North America, the U.S. arm of SmartDV Technologies India Private Ltd. The company provides well-supported verification IP blocks that include compliance test suites and complete functional coverage models that help accelerate time to market. The verification models are generated by the company’s internally developed compiler technology, which allows the company to rapidly generate the verification IP and tweak the IP very rapidly (in days rather than weeks) if customers need any customization or a bug must be corrected. Also offering verification IP, TrueChip provides support for USB 3, various versions of ARM’s AMBA bus, and will shortly have the new USB 3.1 verification IP.
Additional DAC product updates will appear in the next column.

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