Archive for July, 2013

The Big and Small Come Together at Semicon and Intersolar

Thursday, July 25th, 2013

The recently held Semicon West and Intersolar Conferences in San Francisco were interesting examples of technology extremes. At Semicon, for example, major efforts are underway to define the equipment and fabrication facilities needed to produce chips based on 450 mm diameter wafers, while at the other extreme at Semicon, device and equipment designers were challenging each other to define and design ultra-small transistors and the lithography and other systems capable of fabricating devices with gate dimensions of 14 nm, 10 nm, and even smaller features. Intersolar also had it extremes, with presentations discussing energy efficiency of photovoltaic cells measuring a few square inches to the performance aspects of multi-square-meter PV panels and the implementation of large multi-acre commercial PV arrays.

Large research consortiums such as IMEC (formerly the Interuniversity Microelectronics Centre) in Leuven, Belgium, LETI (Laboratoire D’Electronique et de Technologies de L’Information) in Grenoble, France, Sematech in Albany, NY, as well as foundries such as Global Foundries, TSMC, and others are all working hard to define and qualify the processes needed for future-generation chips. Over the past few decades, scaling has lowered the cost of transistors by integrating more and more devices on a chip, even as the cost to fabricate the chips continued to increase.

However, Kurt Ronse, director of advanced patterning at IMEC explains that the extremely high cost of fabrication tools and facilities to implement features of 14 nm and smaller, has led to an increasing cost per transistor. The higher cost comes as a result of the use of triple or quadruple patterning with 193 nm immersion lithography. Such patterning techniques require many more masks to create the ultra-small features, and the higher number of masks adds considerably to the fabrication cost. Subi Kengeri, the Vice President of Advanced Technology Architecture at Global Foundries confirmed the rising cost of lithography comparison to other factors in a TechXpot presentation. In the graph he presented, various steps in the manufacturing process—etch, CMP, Doping, Metrology, metal deposition, dry etch, diffusion and dielectric deposition, and lithography were compared for relative costs (Figure 1). In most cases only moderate cost increases were observed. However lithography costs escalated the most for 193i for nodes below 20 nm.

Figure 1: A comparison of costs of difference aspects of the manufacturing flow was done by Global Foundries across four process nodes to show the cost increases as the process nodes shrink from 28 nm to 20 nm, from 20 nm to N+1 nm using 193i immersion lithography, and alternately from 20 nm to N+1 using extreme ultraviolet lithography. As the graph shows, lithography costs skyrocket for the N+1 node using immersion lithography, but when EUV lithography is used the lithography cost drops considerably.


According to Ronse, it will still be a few years before EUV systems can be used in mass production, but only EUV systems can enable the 50% scaling needed to reach the 10 nm node. Current EUV research has led to UV power sources capable of delivering about 55 W. However, for a tool capable of commercial production, UV sources capable of 250 W will be needed. Such sources are not expected until 2015 at the earliest. Additionally, Ronse is hopeful that at the 10 nm node, EUV lithography can reverse the cost escalation trend since double or triple patterning would not be needed to create the 10 nm features (Figure 2).

Figure 2: Researchers at IMEC also agree that lithography costs have become a significant portion of the fabrication flow. In this graph the 28 nm node is used as the relative reference, with the 20 nm node costing almost 50% more and the N+1 193i showing an almost 80% cost increase over the 28 nm node, while the use of EUV promises to reduce the cost increase to just 20% vs the 28 nm node.


At the device level there has been much written about the three-dimensional FinFET structures and the high performance that such transistors can deliver. However, there is a competition brewing between FinFET advocates and the supporters of planar fully-depleted silicon-on-insulator (FDSOI) device structures. Additionally, to further boost device performance, researchers are looking beyond silicon for the channel material in future transistor structures — options being researched include III-V materials, silicon-germanium, germanium, and carbon nanotubes.

As Maud Vinet, the FDSOI Manager at LETI explained, the planar FDSOI structure requires fewer masks and is easier to scale than the 3D structure of the FinFET. Additionally, with FDSOI designers can take one of two directions – they can opt for lower power consumption at comparable performance to current designs, or they can design for higher performance at comparable power levels. This quarter Vinet expects LETI’s development partner, STMicro, to start releasing FDSOI 14 nm design kits, while in early 2014, device and process models for 10 nm FDSOI designs should be ready for STMicro to develop the design kits for release to the availability in the third quarter of 2014.

Dave Bursky, Chip Design Magazine

Microfluidics – an interesting blend of MEMS, IC technologies, and paper

Wednesday, July 3rd, 2013

At a recently held MEMS Technology and Business Symposium hosted by MEPTEC (the Microelectronics Packaging and Test Engineering Council) in San Jose, Calif., many advances in MEMS technology focusing on health care demonstrated the implementation in silicon of pumps, valves, chemical sensing, and still other functions. Additional research on the use of paper rather than silicon as the substrate shows a lot of promise since paper is very inexpensive, is compatible with many chemical/biochemical/medical applications, and it transports liquids using capillary forces, thus eliminating the need for a MEMS-based pump.

This combination of microscopic mechanical functions, silicon control circuits, and paper-based sensors, is making possible a wide range of products for the medical eHealth market and for industrial and military applications. As demonstrated in a presentation by Dr. Gisela Lin from University of California at Irvine, silicon technology can now implement all the functions to form a “lab-on-a-chip” – bubble pumps, fluid channels, a mixing chamber, a polysilicon heater, and valves, all interconnected and controlled by an off-chip processor (Figure 1). The technology is similar that used by the ink-jet printer print heads.

Figure 1: Implemented in silicon, this lab-on-a-chip can pump liquid through fluid channels, warm the liquid using polysilicon heaters and control the liquid flow into mixing chambers via electrically controlled valves.



And the innovation doesn’t stop there as Dr. Janusz Bryzek, the Vice President of Development for MEMS and Sensing Solutions at Fairchild Semiconductor pointed out in the conference’s opening presentation. Driving that development is the growth in the wearable health monitoring market – according to ABI Research, a market research company, in 2010 just 10 million monitoring devices were deployed and all for mostly sports and fitness applications. However by 2014, ABI analysts expect the market to grow to 420 million wearable health monitors, with about 59 million used at home.

Ongoing research at several universities is examining the ability of directly printing sensors on skin, allowing direct-contact measurements. For example, at the University of Illinois at Urbana-Champaign, researchers have succeeded in printing a triple-function sensor that senses the skin’s temperature, strain, and hydration state, all of which are useful to track general health and wellness, as well as for monitoring wound healing (Figure 2). An even more complex sensor circuit developed at the University of California at San Diego combines ECG and EMG sensors, temperature sensors, strain gauges, photodetectors, a wireless antenna, a wireless communications oscillator, a power pick-up coil to capture transmitted power, and an LED—all in a thin layer of rubbery polyester that allows the senosrs to stretch, bend, or wrinkle. Such a solution can provide a means to monitor premature babies to detect the onset of seizures, which could lead to epilepsy or brain development problems (Figure 3).

Figure 2: Sensors directly printed on the skin by researchers from the University of Illinois at Urban-Champaign can sense temperature, strain, and hydration state.



Figure 3: Multiple sensors as well as a wireless power pick-up coil and simple transmitter and antenna allow this sensing solution in a thin flexible polymer from the University of California at San Diego, be used for various patient monitoring applications. One such  application could be to monitor premature babies to detect the onset of seizures, which could affect the baby’s development.


In addition to these advanced research prototypes, there are many real examples of Appcessories – application software and peripherals that link to and run on smartphones such as the Apple iPhone. Bryzek highlighted just a few – Proteus offers digestable sensors that send wireless signal through the body to a receiver. The sensors measure heart rate, activity, and respiratory rate. GeneZ offers a low-cost DNA chip containing up to 64 reaction of less than 1 microliter in volume – assay time is 10 to 30 minutes and the cost is less than $1000 (the chip cost is just $5 to $10). Uchek from MIT uses the smartphone’s image sensor and a software application available on the Apple App Store to read test strips and it can detect up to 25 diseases such as diabetes, urinary tract infections, and pre-clampsia. The test strips can also measure the levels of glucose, proteins, ketones, and still other health factors.

Putting a doctor in a pocket, Scanadu released three home diagnostic tools that leverage the sensors and processing capability in a Smartphone to perform imaging, sound analysis, molecular diagnostics, data analytics, and run a suite of algorithms that can create a comprehensive, real-time picture of your health. A “Lab on a Chip” developed by STMicroelectronics is employed by Veredus Laboratories to detect the current subtype of H7N9 (Avian Flu) along with other types of human subtypes of Influenza A. The Lab on a chip combines two powerful molecular biological applications – polymerase chain reaction and microarray and can detect the infection with a high accuracy and sensitivity within two hours while providing genetic information on the infection that traditionally would take days to weeks to learn. One last example provided by Bryzek is a device that performs DNA and RNA sensing – Nanobiosim, an engine that integrates physics, biomedicine, and nanotechnology that can rapidly and accurately detect genetic fingerprints from any biological organism.

Dave Bursky, Technology Editor

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