Archive for October, 2011

Advances at IDF are not just in the CPUs

Monday, October 3rd, 2011

The myriad products unveiled at the recent Intel Developer Forum in San Francisco, CA, will give designers many options for developing next-generation computers and peripherals for many years to come. Aside from the new CPUs unveiled by Intel at the forum, advanced display interfaces, high-speed expansion port solutions, wireless interfaces, and new circuits to power the next-generation processors are just some of the developments that will support future Intel CPUs.(More about the CPUs in a future column.)

One exhibitor, Integrated Device Technology unveiled products that encompassed three support areas–PCIe, power supply, and displays. In the PCIe arena the company developed a bridge chip that translates the PCIe protocol to serial RapidIO Gen2 protocol and vice-versa. In the power supply area the company unveiled its coolRAC power architecture that improves power supply energy efficiency and lowers system operating costs. And in the third area, a DisplayPort ViewXpand chip that turns a single DisplayPort output channel into three DVI or HDMI outputs, allowing one graphics chip to support four monitors (one native HDMI/DVI port from the graphics chip plus the three generated channels from the ViewXpand chip).

The IDT Tsi721 protocol conversion bridge extends scalable RapidIO-enabled peer-to-peer multiprocessor clusters to the x86 processor environment. This chip brings together the best of two powerful interconnect protocols and opens up new applications and markets for RapidIO. Providing a 16 Gbps PCIe Gen2 to 16 Gbps RapidIO Gen2 bridge, the chip allows existing RapidIO systems in the wireless, defense, imaging, and industrial markets to maintain their high-performance, low-latency, and high-flexibility characteristics while enabling the use of Intel’s high-performance CPUs. Such a bridge product will allow OEMs in these markets to deploy x86-based RapidIO systems with peer-to-peer clustering, scalability, low end-to-end system latency, and hardware enabled fault isolation. For more info, go to www.idt.com/go/SRIO-Bridges.

IDT’s efforts to improve power-supply efficiency have resulted in the company’s coolRAC power architecture, which combines low-voltage point-of-load conversion and AC distribution. According to Arman Naghavi, the company’s vice president and general manager of the Analog and Power Division, the coolRAC architecture achieves an end-to-end power efficiency of close to 90%, which is about a 10% improvement over traditional approaches. The improved efficiency results in significant power savings and reduced cooling requirements, thus reducing the data center’s carbon footprint.

To reduce the clutter of graphics cards required to drive multiple monitors in a system, designers at IDT have crafted the VMM1403, a chip that contains one DisplayPort v1.1a input and three DVI/HDMI outputs. A single graphics card employing this chip allows users to enjoy an immersive multi-screen gaming experience, or allow brokers to view multiple screens containing financial data, or allow MCAD users or animation creators to simultaneously display different portions of their project. The chip supports main link rates of 2.7 Gbits/s(HBR) and 1.62 Gbits/s (RBR) from the source and all ports are protected with the highest level of built-in security circuitry and are fully compliant with the industry standard HDCP v1.3 standard. For more about the expander, go to www.idt.com/go/viewxpand.

More to come in future columns.

Dave Bursky, Consultant

PRN Engineering Services

prn_engineering@comcast.net


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