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One EDA Company Embraces IP in an Extreme Way

Tuesday, June 7th, 2016

Silvaco’s acquisition of IPextreme points to the increasing importance of IP in EDA.

By John Blyler, Editorial Director

One of the most promising directions for future electronic design automation (EDA) growth lies in semiconductor intellectual property (IP) technologies, noted Laurie Balch in her pre-DAC (previously Gary Smith) analysis of the EDA market. As if to confirm this observation, EDA tool provider Silvaco just announced the acquisition of IPextreme.

At first glance, this merger may seems like an odd match. Why would an EDA tool vendor who specializes in the highly technical analog and mixed signal chip design space want to acquire an IP discovery, management and security company? The answer lies in the past.

According to Warren Savage, former CEO of IPextreme, the first inklings of a foundation for the future merger began at DAC 2015.  The company had a suite of tools and an ecosystem that enabled IP discovery, commercialization and management. What they lacked was a strong sale channel and supporting infrastructure.

Conversely, Silvaco’s EDA tools were used by other companies to create customized analog chip IP.  This has been the business model for most of the EDA industry where EDA companies engineer and market their own IP. Only a small portion of the IP created by this model have been made commercially available to all.

According to David Dutton, the CEO of Silvaco, the acquisition of IPextreme’s tools and technology will allow them to unlock their IP assets and deliver this underused IP to the market. Further, this strategic acquisition is part of Silvaco’s 3-year plan to double its revenues by focusing – in part – on strengthening it’s IP offerings in the IOT and automotive vertical markets.

Savage will now lead the IP business for Silvaco. The primary assets from IPextreme will now be part of Silvaco, including:

  • Xena – A platform for managing both the business and technical aspects of semiconductor IP.
  • Constellations – A collective of independent, likeminded IP companies and industry partners that collaborate at both the marketing and engineering levels.
  • Coldfire processor IP and various interface cores.
  • “IP Fingerprinting” – A package, which allows IP owners to “fingerprint” their IP so that their customers can easily discover it in their chip designs and others using ”DNA analysis” software without the need for GDSII tags.

The merger should be mutually beneficial for both companies. For example, IPextreme and its Constellation partners will now have access to a worldwide sales force and associated infrastructure resources.

On the other hand, Silvaco will gain the tools and expertise to commercialize their untapped IP cores. Additionally, this will complement the existing efforts of customers who use Silvaco tools to make their own IP.

As the use of IP grows, so will the need for security. To date, it has been difficult for companies to tell the brand and type of IP in their chip designs. This problem can arise when engineers unknowingly “copy and paste” IP from one project to another. The “IP fingerprinting” technology developed by IPextreme creates a digital representation of all the files in a particular IP package. This representation is entered into a Core store that can then be used by other semiconductor companies to discover what internal and third-party IP is contained in their chip designs.  This provides a way for companies to protect against the accidental reuse of their IP.

According to Savage, there is no way to reverse engineer a chip design from the fingerprinted digital representation.

Many companies seem to have a disconnect between the engineering, legal and business side of their company. This disconnect causes a problem when engineers use IP without any idea of the licensing agreements attached to that IP.

“The problem is gaining the attention of big IP providers who are worried about the accidental reuse of third-party IP,” notes Savage. “Specifically, it represents a liability exposure problem.”

For smaller IP providers, having their IP fingerprint in the CORE store could potentially mean increased revenue as more instances of their IP become discoverable.

In the past, IP security measures have been implemented with limited success with hard and soft tags. (see, “Long Standards, Twinkie IP, Macro Trends, and Patent Trolls”) But tagging chip designs in this way was never really implemented in the major EDA place and route tools, like Synopsys’s IC Compiler. According to Savage, even fabs like TSMC don’t follow the Accellera tagging system, but have instead created their on security mechanisms.

For added security, IPextreme’s IP Fingerprinting technology does support the tagging information, notes Savage.

Autonomous Car Patches, SoC Rebirth, IP IoT Platforms and Systems Engineering

Wednesday, December 9th, 2015

Highlights include autonomous car technology, patches, IoT Platforms, SoC hardware revitalization, IP trends and a new edition of a systems engineering classic.

By John Blyler, Editorial Director, IP and IoT Systems

In this month’s travelogue, publisher John Blyler talks with Chipestimate.TV director Sean O’Kane about the recent Renesas DevCon and trends in software security patches, hardware-software platforms, small to medium businesses creating System-on-Chips, intellectual property (IP) in the Internet-of-Things (IoT) and systems engineering management. Please note that what follows is not a verbatim transcription of the interview. Instead, it has been edited and expanded for readability. I hope you find it informative. Cheers — JB


ChipEstimate.TV — John Blyler Travelogue, November 2015

Read the transcribed, complete post on the “IP Insider” blog.



Soft (Hardware) and Software IP Rule the IoT

Tuesday, September 2nd, 2014

By John Blyler, JB Systems

Both soft (hardware) and software IP should dominate in the IoT market. But for which segments will that growth occur? See what the experts from IPExtreme, Atmel, GarySmithEDA, Semico Research and Jama Software are thinking.

The Internet-of-Things will significantly increase the diversity and amount of semiconductor IP. But what will be the specific trends among the hardware and software IP communities? Experts from both domains shared there perceptions including,  Warren Savage, President and CEO of IPExtreme; Patrick Sullivan, VP of Marketing, MCU Business Unit for Atmel; Gary Smith, Founder and Chief Analyst for Gary Smith EDA; Richard Wawrzyniak, Senior Market Analyst for ASIC & SoC at Semico Research, and; Eric Nguyen, Director of Business Intelligence at Jama Software. What follows is a portion of their responses. — JB

Blyler: Do you expect an accelerated growth of both hardware and software IP (maybe subsystem IP) due to the growth of the IoT? What are the growth trends for electronic hardware and software IP?

Savage: I don’t think that there is anything special about the Internet-of-Things (IoT) from an intellectual property (IP) perspective.   The prospect of IoT simply means there is going to be a lot more silicon in the world as we start attaching networking to things that previously were not connected. As a natural evolution of the semiconductor market, hardware and software IP is going to keep growing and will outpace everything else for the foreseeable future. Subsystems are a natural artifact of that maturing as well as customers wanting to do more and more with less people, outsourcing whole functions of chips to be delivered from their IP supplier who is likely an expert in that subject matter.

Sullivan: The largest growth will be in software IP for hardware IPs that already exists in order to connect devices to the Internet. Developers that are not familiar with wireless applications will find themselves making connected devices, and for suppliers to have context aware stacks and other IP tailored for the different IoT usage models will be crucial. i.e.; just having a ZigBee stack is not sufficient. You need a version for healthcare, a version for lighting, and so on.

Security is also going to be an important factor for both securing communication between IoT devices and the cloud (SSL/TLS technologies), and also to authenticate that firmware images running on connected devices have not been tampered with. Addressing these needs may require additional software development of IoT devices, and potentially specialized hardware components as well.

On the hardware side, the main focus will continue to be power consumption reduction as well as range and quality improvements.

Smith: Yes, growth in hardware and software IP will increase with the IoT expansion. However, the IoT market comprise multiple segments. To get accurate growth figures you would need to explore them all (see Table).

Table: Markets for the Internet-of-Things. (Courtesy of

Wawrzyniak: I do expect some acceleration of revenues derived from IP going into IoT applications. At this point it is hard to determine just how much acceleration there will be since we are just at the very beginning of this trend. It also will depend upon which types of IP are chosen as the ones most favored by SoC designers. For example, if designers select of one of the wireless IP types as the preeminent solution, then this might be more expensive (generate more IP revenue over time) than say ZigBee.

Given the sheer volume of IoT applications and silicon being projected, it is possible that once a specific process geometry is decided on as the optimum type to use, the IP characterized for that geometry might actually be less expensive than the same IP at another geometry. Volume will drive cost in this case. All these factors will go into figuring out how much additional IP revenue will be generated. I would say a safe estimate today would be on the order of 10%.Wawrzyniak: I do expect some acceleration of revenues derived from IP going into IoT applications. At this point it is hard to determine just how much acceleration there will be since we are just at the very beginning of this trend. It also will depend upon which types of IP are chosen as the ones most favored by SoC designers. For example, if designers select of one of the wireless IP types as the preeminent solution, then this might be more expensive (generate more IP revenue over time) than say ZigBee.

I also think it’s likely that IP Subsystems will be created for IoT applications. Again, this depends on how complex the silicon solution will need to be. If we are talking lightbulbs, then it is hard to imagine that an IP Subsystem will be needed. On the other hand, a relatively complex chip might require an IP subsystem, e.g., a Sensor Fusion Hub subsystem. Sensors will certainly be everywhere in the IoT, so why not create a subsystem that deals with this part of the solution and ties it all together from the designer

Hard IP will probably be more expensive than Soft IP. I would say that Soft IP will be used more in these types of SoCs. I would estimate that it could be as high as a 70 – 30 split in favor of Soft IP.

Nguyen: Absolutely, the growth of IoT will not only open new markets such as wearable technologies and home automation but will also cause disruption in existing due to software based services being delivered through connected devices. Technology products are evolving from electro-mechanical based IP competitive differentiation to customer experience differentiation powered by software applications running on optimized hardware.

The trends in hardware and software IP are accelerating the rate of innovation for customer facing products, which in turn will have a direct impact throughout the supply chain. Software producers must mange the interdependencies not only across their product lines but also across the various technologies they’ll be deployed on (i.e. iOS, Android, Web, integrated into 3rd party technology) or various subsystems. The connected aspect of these technologies allows vendors to continually update the offerings and therefore evolve the customer experience throughout the life of the physical technology.

The performance demands of continuously evolving software heavy products is also driving accelerated innovations throughout the supply chain, specifically hardware components such as Systems on Chip, Systems in a Package, sensor technology, and battery/power management.

Final product producers are also accelerating release cycles and therefore driving the need to more easily integrate sub-components. This demand is driving the demand for Systems in a Package (SiP) technologies, which incorporate the chips, drivers, and software within a physical sub-component package that can easily integrated into the overall system. Semiconductor companies must now coordinate the growing complexity of silicon, software, and documentation development while accelerating their ability to incorporate market feedback into product roadmaps, R&D, and ultimate manufacturing and delivery to customers; all the while ensuring they can meet per unit cost targets.

Blyler: Thank you.

IP Smoke Testing, PSI5 Sensors, and Security Tagging

Friday, April 19th, 2013

The growth of semiconductor IP brings challenges for subsystem verification, integration, security, and the addition of sensor standards. Can Savage clear the smoke?

Warren Savage, marathon runner and President & CEO of IP-Extreme, talks about the trends, misconception, and dangers resulting from the increasing popularity of semiconductor intellectual property (IP). What follows is the first portion of a two-part story.

Blyler: Let’s start by talking about trends in IP for field-programmable-gate-array (FPGA) and application-specific-integrated-circuit (ASIC) systems-on-a-chip (SoCs). What’s new?

Savage: If you look at global macro trends, you’ll see an increased amount of customization. For example, the iPhone can be customized “six ways to Sunday.” I’m starting to see something similar in the semiconductor space, where companies are differentiating themselves through IP and putting it together in different ways. Some guys – the Broadcoms and Qualcomms of the world – can do huge quantities of SoCs. But many mid- and lower-tier guys are doing more customized types of products that appeal to a certain niche market. [Editor’s Note: Makimoto’s Wave remains in its customization cycle.]

If the volumes are low enough, an FPGA with the right IP could offer a big differentiation from an off-the-shelf (ASIC) SoC. I’m seeing more of that trend and it gets stronger every year.

Blyler: The numbers are showing that IP continues to be a larger share of the revenue. How about subsystem IP? Is it starting to take off – perhaps in the vertical integration of certain types of IP?

Savage: One of the artifacts of the downturn from several years ago is that fewer engineers must do more increasingly complex things. We are seeing people buy more of our subsystem IP that includes the processors, bus infrastructure, and peripherals needed to run a real-time operating system (RTOS). People want to buy the whole thing and start with a working platform, then add their IP around that platform.

Blyler: Won’t the move toward subsystem IP lead to more verification and integration issues? Does the entire subsystem then come with a suite of tests or do you need to test each IP block individually?

Savage: The expectation is that the subsystems are fully verified and come to the designer as a black box. Typically, people don’t re-verify things of that complexity; it is too much. Plus, it has already been verified at the subsystem level by the IP provider. What the IP provider supplies is some type of integration-level test so the designer can – for lack of a better word – run a “smoke test” to ensure that the subsystem is installed properly and fundamentally working. In processor-based designs, it means you can run software like a “hello world” test that verifies all of the memory, interface, and peripheral connections.

Not a lot of extra verification tests come along with the IP. After all, the IP is expected to be used as a black box.

Blyler: With the rise of sensors in our increasingly connected world, I would expect to see more sensor-related IP. Is that the case? Or is it a microelectromechanical-systems (MEMS) technology and fabrication issue?

Savage: One of our major customers is a provider of automotive sensors. They use MEMS technology for sensors, accelerometers, etc. – as part of their products. But these MEMS chips and sensors still need to be connected into an SoC. That’s why we’re seeing interest in the Peripheral Sensor Interface 5 (PSI5) standard, which is a specific interface dedicated to automotive sensor applications. PSI5 is kind of an upgrade to the Local Interconnect Network (LIN) standard.

Here is an overview of hardware interfaces (courtesy of Vector).

For background, there’s a hierarchy of automotive interface standards. At the low end of complexity is LIN, which is typically used to control the mirrors on a car via a driver-side toggle switch. Next comes the controller-area-network (CAN) bus interface, which has a lot more bandwidth for moving data around. CAN is used for suspension, airbags, etc.

Lastly, FlexRay is a true vehicle network for real-time apps. Eventually, it will give way to a drive-by-wire or steer-by-wire implementation.

Blyler: What’s new on the security front for semiconductor IP?

Savage: On the commercial side, I’m seeing less and less concern about security. But there are some developments that will be important. For some time now, there has been an IEEE standard on hard IP tagging that allows you to track cores at the GDS level.(Editor’s Note: Hard IP is offered in a GDSII format and optimized for a specific foundry process.)

The thing that has been missing is what to do about soft IP. (Editor’s Note: Soft IP is synthesizable in a high-level language like RTL, C++, Verilog, or VHDL.) Watermarking the code is a common approach for tracking soft IP and one that we use at IP Extreme. I’ve been working with Kathy Werner, who heads a committee on soft-IP tagging. She has worked with IP at Freescale and then Accellera. Her committee is incorporating many of the same conventions into soft IP that proved successful in hard IP. The goal is that these soft-IP security mechanisms will work throughout the EDA-tool design flow to be propagated downward into the GDSII. In other words, the high-level soft-IP tags could be detected at the GDS level.

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APAC Surges Ahead in Global IP Market

Wednesday, December 21st, 2011

A recent report by Technavio Insights confirms strong growth in IP usage and development in Asian countries. What will this mean to the future of chip design?


It has been a notable year for the semiconductor intellectual property (IP) industry. Technavio Insights, research platform of Infiniti Research, expects the global semiconductor IP market to grow at 7.75 percent year-over-year until FY2014. This growth is traced to continuous advancement in chips and electronic devices, in addition to demands in wireless, analog and optical technologies.


Total revenue for the global semiconductor IP market is driven by three key regions: theAmericas, the Europe Middle East and Africa (EMEA) and the Asia Pacific (APAC) regions. (Courtesy of TechNavio Analysis)


The birthplace of the world’s semiconductor industry – theAmericas– continues to contribute the largest share of total revenue for the global IP industry.  TechNavio reports that most of the IP vendors in the EMEA region cater to customers either in theUSor in the APAC region. This is why the EMEA region contributes only 26 percent to the overall global revenue.


Despite its relative delay into the semiconductor market, the APCA region has already outgrown the EMEA area in terms of market share. A rapidly increase in IP related activities have spurred this growth in the APAC region, as have the shifting of R&D centers from theUSandEuropeto minimize production costs.


Strong growth in the Asian IP market is one of the reasons for the introduction of major IP portals inJapanandChina. These portals will also make local Asian IP available for global consumption in the design of future chips. Such trends will lend an interesting twist to questions of IP security, theft, quality and verification. All of which will make for interesting future blogs.

(Originally posted on