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New Event Focuses on Semiconductor IP Reuse

Monday, November 28th, 2016

Unique exhibition and trade show levels the playing field for customers and vendors as semiconductor intellectual property (IP) reuse grows beyond EDA tools.

By John Blyler, Editorial Director, JB Systems

The sale of semiconductor intellectual property (IP) has outpaced that of Electronic Design Automation (EDA) chip design tools for the first time, according to a report of Q3 2015 sales by the Electronic System Design Alliance’s MSS report. Despite this growth, there is no industry event dedicated solely to semiconductor IP – until now.

The IP community in Silicon Valley will witness an inaugural event this week, one that will enable IP practitioners to exchange ideas and network while providing IP buyers with access to a diverse group of suppliers. REUSE 2016 will debut on December 1, 2016 at the Computer History Museum in Mountain View, CA.

I talked with one of the main visionaries of the event, Warren Savage, General Manager of IP at Silvaco, Inc. Most professionals in the IP industry will remember Savage as the former CEO of IPextreme, plus the organizer of the Constellations group and the “Stars of IP” social event held annually at the Design Automation Conference (DAC).

IPextreme’s Constellations group is a collection of independent semiconductor IP companies and industry partners that collaborate at both the marketing and engineering levels for mutual benefit. The idea was for IP companies to pool resources and energy to do more than they could do on their own.

This idea has been extended to the REUSE event, which Savage has humorously described as the steroid-enhanced version of the former Constellations sponsored “Silicon Valley IP User Group” event.

“REUSE 2016 includes the entire world of semiconductor IP,” explains Savage. “This is a much bigger event that includes not just the Constellation companies but everybody in the IP ecosystem. Our goal is to reach about 350 attendees for this inaugural event.”

The primary goal for REUSE 2016 is to create a yearly venue that brings both IP vendors and customers together. Customers will be able to meet with vendors not normally seen at the larger but less IP-focused conferences. To best serve the IP community, the founding members decided that the event’s venue should be a combination of exhibition and trade show, where exhibitors present technical content during the trade show portion of the event.

Perhaps the most distinguishing aspect of REUSE is that the exhibition hall will only be open to companies who were licensing semiconductor design and verification IP or related embedded software.

“Those were the guiding rules about the exhibition,” noted Savage. “EDA (chip design) companies, design services or somebody in an IP support role would be allowed to sponsor activities like lunch. But we didn’t want them taking attention away from the main focus of the event, namely, semiconductor IP.”

The other unique characteristic of this event is its sensitivity to the often unfair advantages that bigger companies have over smaller ones in the IP space. Larger companies can use their financial advantage to appear more prominent and even superior to smaller but well established firms. In an effort to level the playing field, REUSE has limited all booth spaces in the exhibition hall to a table. Both large and small companies will have the same size area to highlight their technology.

This year’s event is drawing from the global semiconductor IP community with participating companies from the US, Europe, Asia and even Serbia.

The breadth of IP related topics covers system-on-chip (SOC) IP design and verification for both hardware and software developers. Jim Feldham, President and CEO, of Semico Research will provide the event’s inaugural keynote address on trends driving IP reuse. In addition to the exhibition hall with over 30 exhibitors, there will be three tracks of presentations held throughout the day at REUSE 2016 on December 1, 2016 at the Computer Science Museum in San Jose, CA. See you there!

Originally posted on Chipestimate.com “IP Insider”

Imagination Talks about RFIC, IP, Embedded IoT and Fabric-based SoCs

Friday, December 18th, 2015

Tony King-Smith of Imagination Technologies discusses the need for RF IC designers, IP platforms, IoT as the new embedded and fabric-based SoCs.

At this year’s Imagination Summit 2015 in Silicon Valley, John Blyler, editorial director for “IoT Embedded Systems” sat down with Tony King-Smith, the Executive VP of Marketing at Imagination, to talk about RF design, IP platforms, embedded IOT and fabric-based SoC trends. What follows are excerpts from that conversation. – JB

Read the complete story on the Chipestimate “IP Insider” blog.

Autonomous Car Patches, SoC Rebirth, IP IoT Platforms and Systems Engineering

Wednesday, December 9th, 2015

Highlights include autonomous car technology, patches, IoT Platforms, SoC hardware revitalization, IP trends and a new edition of a systems engineering classic.

By John Blyler, Editorial Director, IP and IoT Systems

In this month’s travelogue, publisher John Blyler talks with Chipestimate.TV director Sean O’Kane about the recent Renesas DevCon and trends in software security patches, hardware-software platforms, small to medium businesses creating System-on-Chips, intellectual property (IP) in the Internet-of-Things (IoT) and systems engineering management. Please note that what follows is not a verbatim transcription of the interview. Instead, it has been edited and expanded for readability. I hope you find it informative. Cheers — JB

 

ChipEstimate.TV — John Blyler Travelogue, November 2015

Read the transcribed, complete post on the “IP Insider” blog.

 

 

Review of Jama, ARM Techcon and TSMC OIP Shows

Friday, November 14th, 2014

October issues of the “Silicon Valley High-Tech Traveler Log” – with Sean O’Kane and John Blyler

Three events from TSMC, ARM and JAMA Software highlight the breadth and depth of IP development that (hopefully) results in manual-less consumer apps.

A few week’s ago, I attended three shows -  Jama’s Software Product Delivery SummitTSMC’s Open Innovation Platform (OIP) and ARM’s Techcon. While each event was markedly different there was an unintentional common thread, i.e., all three dealt with the interplay between hardware and software IP systems – albeit on different levels of the supply chain.

Each of these shows characterized that interplay in different ways. For TSMC, it was a focus on deep semiconductor manufacturing-related IP. Conversely, Jama Software dealt with product delivery issues for which embedded hardware and application software played a major role. Embedded software on boards running the company’s flagship processors and ecosystem IP hardware peripherals was the focus at the ARM Techcon. Why are these various instantiations of IP important?

Read the rest of the story at: IP-Based Technology without Manuals?

 

 

 

 

 

 

Soft (Hardware) and Software IP Rule the IoT

Tuesday, September 2nd, 2014

By John Blyler, JB Systems

Both soft (hardware) and software IP should dominate in the IoT market. But for which segments will that growth occur? See what the experts from IPExtreme, Atmel, GarySmithEDA, Semico Research and Jama Software are thinking.

The Internet-of-Things will significantly increase the diversity and amount of semiconductor IP. But what will be the specific trends among the hardware and software IP communities? Experts from both domains shared there perceptions including,  Warren Savage, President and CEO of IPExtreme; Patrick Sullivan, VP of Marketing, MCU Business Unit for Atmel; Gary Smith, Founder and Chief Analyst for Gary Smith EDA; Richard Wawrzyniak, Senior Market Analyst for ASIC & SoC at Semico Research, and; Eric Nguyen, Director of Business Intelligence at Jama Software. What follows is a portion of their responses. — JB

Blyler: Do you expect an accelerated growth of both hardware and software IP (maybe subsystem IP) due to the growth of the IoT? What are the growth trends for electronic hardware and software IP?

Savage: I don’t think that there is anything special about the Internet-of-Things (IoT) from an intellectual property (IP) perspective.   The prospect of IoT simply means there is going to be a lot more silicon in the world as we start attaching networking to things that previously were not connected. As a natural evolution of the semiconductor market, hardware and software IP is going to keep growing and will outpace everything else for the foreseeable future. Subsystems are a natural artifact of that maturing as well as customers wanting to do more and more with less people, outsourcing whole functions of chips to be delivered from their IP supplier who is likely an expert in that subject matter.

Sullivan: The largest growth will be in software IP for hardware IPs that already exists in order to connect devices to the Internet. Developers that are not familiar with wireless applications will find themselves making connected devices, and for suppliers to have context aware stacks and other IP tailored for the different IoT usage models will be crucial. i.e.; just having a ZigBee stack is not sufficient. You need a version for healthcare, a version for lighting, and so on.

Security is also going to be an important factor for both securing communication between IoT devices and the cloud (SSL/TLS technologies), and also to authenticate that firmware images running on connected devices have not been tampered with. Addressing these needs may require additional software development of IoT devices, and potentially specialized hardware components as well.

On the hardware side, the main focus will continue to be power consumption reduction as well as range and quality improvements.

Smith: Yes, growth in hardware and software IP will increase with the IoT expansion. However, the IoT market comprise multiple segments. To get accurate growth figures you would need to explore them all (see Table).

Table: Markets for the Internet-of-Things. (Courtesy of GarySmithEDA.com)

Wawrzyniak: I do expect some acceleration of revenues derived from IP going into IoT applications. At this point it is hard to determine just how much acceleration there will be since we are just at the very beginning of this trend. It also will depend upon which types of IP are chosen as the ones most favored by SoC designers. For example, if designers select of one of the wireless IP types as the preeminent solution, then this might be more expensive (generate more IP revenue over time) than say ZigBee.

Given the sheer volume of IoT applications and silicon being projected, it is possible that once a specific process geometry is decided on as the optimum type to use, the IP characterized for that geometry might actually be less expensive than the same IP at another geometry. Volume will drive cost in this case. All these factors will go into figuring out how much additional IP revenue will be generated. I would say a safe estimate today would be on the order of 10%.Wawrzyniak: I do expect some acceleration of revenues derived from IP going into IoT applications. At this point it is hard to determine just how much acceleration there will be since we are just at the very beginning of this trend. It also will depend upon which types of IP are chosen as the ones most favored by SoC designers. For example, if designers select of one of the wireless IP types as the preeminent solution, then this might be more expensive (generate more IP revenue over time) than say ZigBee.

I also think it’s likely that IP Subsystems will be created for IoT applications. Again, this depends on how complex the silicon solution will need to be. If we are talking lightbulbs, then it is hard to imagine that an IP Subsystem will be needed. On the other hand, a relatively complex chip might require an IP subsystem, e.g., a Sensor Fusion Hub subsystem. Sensors will certainly be everywhere in the IoT, so why not create a subsystem that deals with this part of the solution and ties it all together from the designer

Hard IP will probably be more expensive than Soft IP. I would say that Soft IP will be used more in these types of SoCs. I would estimate that it could be as high as a 70 – 30 split in favor of Soft IP.

Nguyen: Absolutely, the growth of IoT will not only open new markets such as wearable technologies and home automation but will also cause disruption in existing due to software based services being delivered through connected devices. Technology products are evolving from electro-mechanical based IP competitive differentiation to customer experience differentiation powered by software applications running on optimized hardware.

The trends in hardware and software IP are accelerating the rate of innovation for customer facing products, which in turn will have a direct impact throughout the supply chain. Software producers must mange the interdependencies not only across their product lines but also across the various technologies they’ll be deployed on (i.e. iOS, Android, Web, integrated into 3rd party technology) or various subsystems. The connected aspect of these technologies allows vendors to continually update the offerings and therefore evolve the customer experience throughout the life of the physical technology.

The performance demands of continuously evolving software heavy products is also driving accelerated innovations throughout the supply chain, specifically hardware components such as Systems on Chip, Systems in a Package, sensor technology, and battery/power management.

Final product producers are also accelerating release cycles and therefore driving the need to more easily integrate sub-components. This demand is driving the demand for Systems in a Package (SiP) technologies, which incorporate the chips, drivers, and software within a physical sub-component package that can easily integrated into the overall system. Semiconductor companies must now coordinate the growing complexity of silicon, software, and documentation development while accelerating their ability to incorporate market feedback into product roadmaps, R&D, and ultimate manufacturing and delivery to customers; all the while ensuring they can meet per unit cost targets.

Blyler: Thank you.

Weekly Chip-Science Highlights – Aug. 15th

Friday, August 15th, 2014

By John Blyler

More on Moore’s Law; Thought-Controlled Cameras; Neurons on Chip; IP Bag; Quantum Dots and blogs.

Here’s a mixed of semiconductor-related articles and blogs that caught my attention this week:

  • Can our computers continue to get smaller and more powerful? – Have we reached the limits to computation? In a review article in this week’s issue of the journal Nature, Igor Markov of the University of Michigan reviews limiting factors in the development of computing systems to help determine what is achievable, identifying “loose” limits and viable opportunities for advancements through the use of emerging technologies. His research for this project was funded in part by the National Science Foundation (NSF).
  • Thought-Controlled Camera Confirms IoT Trends – Software start-ups will dominate growth in the Internet-of-Things (IoT) as demonstrated by MindRDR’s application that combines Google Glass and Neurosky biosensor hardware.
  • Brain-inspired chip fits 1m ‘neurons’ on postage stamp – Scientists have produced a new computer chip that mimics the organization of the brain, and squeezed in one million computational units called “neurons”. They describe it as a supercomputer the size of a postage stamp. Each neuron on the chip connects to 256 others, and together they can pick out the key features in a visual scene in real time, using very little power.

Figure: TrueNorth is the first single, self-contained chip to achieve 256 million individually programmable synapses on chip which is a new paradigm. (TrueNorth Core Array, Courtesy of IBM)

  • (Potato) Chip Bags IP – The latest research from MIT, Microsoft and Adobe on recovering speech from the vibrations of ordinary objects confirms the growing importance of software IP.
  • With sharp focus, quantum dot makers scale up to meet demand – This Reuters article discusses the huge growth in the demand quantum dots, the semiconductor crystals that use less power and are cheaper than organic LEDs.

 

Industry Blogs:

  • Kathryn Kranen discusses Jasper, formal verification and the Cadence Acquisition.
  • Mentor’s Colin Walls shares his love of writing, especially embedded software articles about assembly language to software IP.
  • Another interesting blog from Mentor. This time, Christopher Hallinan explores hardware and software complexity via th Yocto Project.
  • Summer is a time for big trips. Synopsys’s Tom d Schutter recently shared an adventure with his family through the westernUS states. That trip sparked comparisons with the task of staring a virtual prototyping project. Finding similarities between function trace information and the unexpected buffalo crossings atYellowstoneNational Park is not an easy task, but Tom pulls it off.
  • Satellite Crowdfunding, Then and Now – Did you know that the first satellite sent up by theUnited Stateswas originally planned to be crowdfunded? Did you also know that the newest amateur satellite sent up in the third quarter of next year will be crowdfunded as well? by Hamilton Carter


 

Target Breach Highlights IP Indifference

Wednesday, January 29th, 2014

The good news is that large amounts of IP go into the design of smart-card chips and RFID tags. The bad news is that the general public isn’t really interested.

Read the story on the “IP Insider.”

Will a New DSP-based IP Subsystem Emerge from Rumors?

Monday, October 28th, 2013

Two rumors about Qualcomm, Arteris, and DSP architectures lead to tantalizing speculation about a new type of DSP-based IP subsystem.

Rumors are tricky things – hard to prove but sometimes harder to disprove. Experience has taught me that the best way to judge technology-based rumors is by looking for convergence. Here’s a case in point: John Cooley at DeepChip has posted emails suggesting that Qualcomm may be engaged in an asset buy with network-on-a-chip (NoC) company Arteris.

This rumor must be weighed in the context of today’s semiconductor intellectual-property (IP) environment. It isn’t unusual for smaller companies to be acquired by larger ones – ostensibly for their IP. Conversely (or to encourage such an acquisition), smaller companies are licensing more and more of their in-house IP for external sales. Why? Kevin Kline from Freescale has noted that the value of the internal IP of a smaller company can be worth more than the market cap of the company itself.

But legal IP guru Jonathan Kaplan (see his latest blog) once told me that, in general, IP holdings are more valuable to smaller rather than very large companies. If that’s true, why would an IP giant like Qualcomm seek to acquire Arteris?

To answer that question, let’s consider another rumor that Qualcomm may license its digital-signal-processing (DSP) architecture. If this supposition proves accurate, the company will join a trend among other multicore-processor giants (e.g., IBM licensing Power CPU; nVidia licensing its GPUs; and Imaginations licensing MIPS).

Does Qualcomm’s rumored interest in Arteris – plus the rumor that Qualcomm may license its DSP architecture – provide evidence of a convergence? That is hard to tell, as we lack a legitimacy weighting for each rumor. Still, they do seem to point to a convergence. Acquiring Arteris’s chip-level interconnect IP might make it easier to integrate Qualcomm’s DSP IP with other non-company cores on a heterogeneous system-on-a-chip (SoC). This is only speculation, as Arteris’s competitors (e.g., Sonics) may disagree with the ease-of-integration assertion.

Still, if these two rumors are true (and that’s a big “if”), chip designers may see the emergence of a new DSP-based IP subsystem. Or so it’s rumored.

Originally posted on Chipestimate.comIP Insider

Is IP Theft the Leading Cause of Tech Decline in the US?

Thursday, August 1st, 2013

A recent Financial Times (FT) article doesn’t mince words in calling China’s “international theft of inventions part of a national business model.” According to the story, China is following an approach long sanctioned by many other Asian countries.

This article, penned by Mark Anderson, chief executive of Strategic News Service, begins with the recent identification by Mandiant – a cyber security specialist – of the theft of foreign intellectual property by a Chinese army unit. But the author notes that Japan in the 1970s was the first practitioner of this new “information mercantilism.” These activities led to the unwanted IP transfer of four US technologies: TV, DRAM, video recording, and steel production. Within a few years, these industries disappeared in the US. Since then, South Korea has adopted and refined this model, explains Anderson.

Courtesy of the Financial Times

Everyone in the semiconductor industry knows the critical importance and financial value of IP. It is not hyperbole to write that IP theft is ruining countries and shifting both military power and economic wealth in ways that were previously unimaginable.

I encourage readers to contemplate the entire FT article and its growing list of comments. You may need to take a brief survey or even pay a very small fee to access the complete article. But it’s well worth the price. Besides, you don’t want to spread the Internet’s “content mercantilism” by stealing good stories without paying for their creation.

 

Related Articles:

 

Originally published on chipestimate.com “IP Insider



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3D Printing vs. Semiconductor Parallelization

Thursday, July 25th, 2013

A perceptive engineer challenges the suggestion that an army of 3D printers may one day replace portions of the semiconductor wafer and chip industry.

A recent article listed 9 ways that 3D printing will change business. Earlier, I had proposed a 10th way - namely, as a replacement for low-volume, low-cost semiconductor fabs.

This blog was picked up by a “3D Printing” law blog written by Paul Banwatt. He focused on my speculations about a future mature technology market where, like today’s consumer PC business, 3D printers will be far cheaper and with much greater resolution and performance than we have now.

“There may well come a time when 3D printers are of such quality and proliferation that they impinge upon commercial manufacturers and abuse patent and IP rights. Could the major semiconductor fabs eventually surrender low-cost, low-production-volume product lines to an army of 3D printers?”

I still maintain that future 3D printing technology could be used for low-volume, low-performance devices. But a seasoned technical professional, Eric Weddington, pointed out that semiconductor wafer manufacturing is a complex process consisting of many parallelized and iterative tasks. That process cannot be easily accomplished by a single manufacturing machine like a 3D printer. What follows is our email “conversation.” — JB

++++

Weddington:  There are three reasons why 3D printing does not affect semiconductor manufacturing:

  1. There are vast differences in scale between what 3D printers do today versus semiconductor manufacturing. 3D printers cannot get down to the nanometer scale.
  2. Semiconductor manufacturing achieves efficiency partially through parallelization of the manufacturing across an entire wafer. In comparison, 3D printing is still very linear, therefore slower and less efficient.
  3. Difference in materials needed to do the manufacturing. There are some pretty harsh chemicals involved in some semi manufacturing.

This is why 3D printers don’t represent any threat to semiconductor manufacturing

Blyler: Good points, but my premise was based on both low-cost, low-production volume lines and stereo-litho: “This idea might not be as crazy as it seems. In a manner similar to the photo-lithography used in today’s IC manufacturing, stereo-lithography – or optical fabrication – is a 3D printing technology based on ultra-violet-curable resins. Both photo- and stereo-lithography use standard patterning techniques to create a multilayered product. …” I agree that 3D printers offer no challenge to today’s semiconductor industry. But the possibility for future challenges seems quite high to me.

Weddington: If you take a look at desktop 3D printers now, and where they have come from, they are not geared for anything like semiconductor manufacturing. The desktop 3D printers now are just an extension of commercial 3D printers, where it’s a linear process (i.e., no parallel manufacturing using masks). The new thing is basically making it low, low cost, and sitting on a desktop. But the basic tool remains the same.

What you’re envisioning, I think (correct me if I’m wrong) is a desktop tool that is like a very low-end version of semi manufacturing tools. But these tools are inherently parallel based in what they do, and you need many different kinds of tools to make the semiconductor-wafer final output. Whereas the 3D printer, the way it works now, is the only tool for the final product.

So while I have no problem with the vision of a low-end semi tool (or suite of them), I don’t see them as really linked to today’s desktop 3D printers. I would also add that I’m not trying to remove how revolutionary a desktop 3D printer is; I think they’re pretty cool and it adds a new dimension to all sorts of things. I just think that semiconductor manufacturing is a different beast and in a class all by itself.

But there are ways to revolutionize that too. ;-)

Blyler: Your comment about “needing many different kinds of tools to make the semiconductor-wafer final output” seems to be the crux of the argument. Point well taken – good discussion!

Figure: The main steps of the semiconductor manufacturing are layering, photolithography, etching, doping, resist removal, and wafer cleaning. (Courtesy of Associate Ku Leuven)



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