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	<title>JB&#039;s Circuit</title>
	<link>http://www.chipdesignmag.com/blyler</link>
	<description>Just another engineering physicist turned editor</description>
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		<title>JohnB&#8217;s Tech Bits</title>
		<description><![CDATA[A lot of stories pass through my email in any given week. Here&#8217;s a collection of those bits that caught my attention, covering technology, engineering, science and social media. &#8211; JB AWR, a developer of RF and Microwave modeling tools, was recently issued a patent for the automatic creation of vias in electrical circuit design. [...]]]></description>
		<link>http://www.chipdesignmag.com/blyler/2012/02/10/johnbs-tech-bits/</link>
			</item>
	<item>
		<title>More SI, Less EDA at DesignCon 2012</title>
		<description><![CDATA[This year’s DesignCon show focused more on board-level signal intregity and testing issue than on chip design and verification.]]></description>
		<link>http://www.chipdesignmag.com/blyler/2012/02/08/more-si-less-eda-at-designcon-2012/</link>
			</item>
	<item>
		<title>Venture Capitalists see Major Investing Changes</title>
		<description><![CDATA[At the recent AO Venture Summit,Silicon Valleyinvestors cautioned about changes to traditional investment funding models as the semiconductor market enters a cyclical downturn.
]]></description>
		<link>http://www.chipdesignmag.com/blyler/2012/01/26/venture-capitalists-see-major-investing-changes/</link>
			</item>
	<item>
		<title>Carbon&#8217;s Exchange Bolsters Front-end IP Chain</title>
		<description><![CDATA[Today’s announcement of Carbon’s IP Exchange portal provides evidence of the growing importance of the semiconductor IP design-manufacturing chain.]]></description>
		<link>http://www.chipdesignmag.com/blyler/2012/01/17/front-end-tools-bolster-ip-design-chain/</link>
			</item>
	<item>
		<title>IP Trumps Moore’s Law in SoC Costs</title>
		<description><![CDATA[Apple continues to reduce system costs through customized chip design via IP integration and software tailoring, not through traditional cost per gate.]]></description>
		<link>http://www.chipdesignmag.com/blyler/2012/01/11/ip-trumps-moore%e2%80%99s-law-in-soc-costs/</link>
			</item>
	<item>
		<title>Time Cloak for Digital Logic?</title>
		<description><![CDATA[Quantum phenomena can be view as waves or particles. Time cloaking has been demonstrated with waves. What might that mean to electron flow for circuit designers?]]></description>
		<link>http://www.chipdesignmag.com/blyler/2012/01/06/time-cloak-for-digital-logic/</link>
			</item>
	<item>
		<title>APAC Surges Ahead in Global IP Market</title>
		<description><![CDATA[A recent report by Technavio Insights confirms strong growth in IP usage and development in Asian countries. What will this mean to the future of chip design?]]></description>
		<link>http://www.chipdesignmag.com/blyler/2011/12/21/apac-surges-ahead-in-global-ip-market/</link>
			</item>
	<item>
		<title>Technical Trade-offs Leave Long Tail</title>
		<description><![CDATA[Architectural trade-offs – typically resulting in IP – made early in a design can affect a company’s market participation for years to come.]]></description>
		<link>http://www.chipdesignmag.com/blyler/2011/12/15/technical-trade-offs-leave-long-tail/</link>
			</item>
	<item>
		<title>RF Telescope at Arecibo Picks up Dr. Who</title>
		<description><![CDATA[Yes - it's a fake story. Still, it would be interesting to see the mathematics showing the reflected signal strength from 25 light years away.]]></description>
		<link>http://www.chipdesignmag.com/blyler/2011/12/12/rf-telescope-at-arecibo-picks-up-dr-who/</link>
			</item>
	<item>
		<title>Voltage Spikes Lead to Deeper Integration</title>
		<description><![CDATA[The move by Silicon Labs toward power systems integration on MCUs points to a larger trend followed by Silicon Blue and IMEC, among others.]]></description>
		<link>http://www.chipdesignmag.com/blyler/2011/12/09/low-power-push-leads-to-deeper-systems-integration/</link>
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