JB’s Circuit

Chanced upon a discussion of the “First Law of Technology” at a Technology and Innovation Strategies event on FaceBook:

“The First Law of Technology says that “with every change in technology that affects consumer behavior, we always overestimate the impact in the short term, but then underestimate the full impact over the long term.” The original dot-com era a decade ago was overhyped, but by now the Web has become a utility, increasingly available anywhere for any purpose. This is the Information Age, yet we’re just beginning to gather the information and understanding to know how it changes our lives.” — L. Gordon Crovitz, the former publisher of the Wall Street Journal

Really, this should have been called the “First Law of Technology” for economists. Nevertheless, I’m curious what the second law would look like? Perhaps it would be as following – taking my lead from the Second Law of Thermodynamics:

The Second Law of Technology states that consumer behavior within a global system which is not yet in equilibrium will favor products that result in the lowest profit margin for their producers. This is an expression of the universal law of increasing product commoditization. The latest casualty of the law has been microprocessor hardware, soon to be followed by EDA tools.

Seriously; Does anyone know the “official” Laws of Technology? Are there any? If so, are they akin to Putt’s Laws?  BTW - I think I know the true identity of Archibald Putt. Lucky me. <grin>

Spent most of the last three days (Apr 14^th - 16^th) attending the Embedded Systems Conference in San Jose, CA. Met with lots of companies, which I’ll report on later. But here’s my quick take on the conference:

Impressions:

• Technical sessions seemed well attended and interesting.

• Traffic on the show floor seemed lighter this year over last year. Not bad, just a bit lighter. This made for an easier parking situation.

• Keynote address started with an entertaining video that highlighted the history of embedded systems. I left shortly after Jack Ganssle started his presentation. Would have liked to stay to listen to Jack and the other speakers, but my publisher had other ideas for my time.

• No real earth-shaking technology was introduced at the show, which is OK since lots of incremental improvements in existing technology were presented, especially in those products aimed at the mobile, multimedia consumer market.

Here’s a short list of my more interesting meetings (all at the show, except where noted):

• Xelerated – network proessor technology (not at the show)
• NXP Semi – ARM9 microcontrollers with tons of peripherals
• Intel Embedded - demos of Atom processor and more
• Mentor – Embedded Group
• Moschip - ICs for networking
• Sidence – memory (had to walk to the “IP” show at the Fairmont for this one)
• XMOS – Software define silicon. The image below is the XMOS XS1-G Development Kit. Very aesthetic with it’s blue glow.

• Elsevier - lots of new embedded titles, including one by Max Domeika on multicore programming
• Ceva – DSP cores
• Congatec – embedded computer boards
• Sun Microsystems - chip multi-threading (CMT) processor designs
• Chartered Semi (not at the show)
• Actel – programmable logic (antifuse and flash FPGAs)
• Power.org group

Coolest technology:

> Met with Brian, one of the inventors/entrepreneurs vying for Google Lunar X-Prize moon rover project. Brain, supported in this effort by his wife, is an ordinary fellow with the drive and daring to bring his idea for a moon rover to fruition. You can also see a Video of the Rover’s first trip outdoors on YouTube.

Oddest sights:

> Eco-lounge at the entrance to the ESC exhibit hall. This “lounge,” was nothing more than a bunch of colorful bean-bag chairs scattered around for attendees benefit. Nice idea, but in all honesty bean bag “chairs” are not all that comfy for anyone over 25. Plus, there is no way to gracefully stand up from the bags.

> Much better than the bean bag chairs - though equally odd - was the “multimedia” chair at the CEVA booth. The multimedia system was powered by CEVA’s DSP technology. Note the weary editor taking a much deserved break.

Good blog by Debra on the McBru site about the way in which engineers use the Internet for their work: Technologists as Laggards
“A study just out by GlobalSpec.com reveals that only 3-4% of engineers surveyed said they used RSS feeds or podcasts to get information. But they aren’t using traditional trade magazines either. What’s king now? The vendor’s own website; 84% said they used supplier websites for work-related purposes. Blogs were doing a little better than other new media, 13% said they used blogs for work. Webcasts are also up-and-coming; 23% said they had attended a webcast.”

My experience is that Google remain the first Internet tool-of-choice for most chip and board design engineers.

Ah, Google! Our liberator and our master. Consider a recent article in Wired by Nicholas Carr, a.k.a high tech’s Captain Buzzkill: Do You Trust Google? His basic thesis is that “computer are technologies of liberation, but they’re also technologies of control. It’s great that everyone is empowered to write blogs, upload videos to YouTube, and promote themselves on Facebook. But as systems become more centralized — as personal data becomes more exposed and data-mining software grows in sophistication — the interests of control will gain the upper hand. If you’re looking to monitor and manipulate people, you couldn’t design a better machine.”

What does this portend for the future? Will bloggers and other web denizens eventually - knowingly or not - submit their humanity to the machine? Will they give way to the dark side of the force, becoming little more than storm troopers who reinforce with words the dictates of their seemingly benevolent media masters? Perhaps the personage of Darth Vader will be the essence of tomorrow’s blogger? (OK, I’m starting to digress. Really must stop writing blogs so late at night…. — JB

Several new e-newsletter style publications have rushed in to fill the void created by the departure of CMP (and others) from the field of meaningful EDA/IC coverage. The latest such venture into the fray (or is it “the fraying world?”) of EDA/IC coverage is Kevin Morris’s “IC Journal. ”

Kevin – a fellow Portlander and editorial colleague - is well known for his witty and insightful blogging-style coverage of the FPGA world in “FPGA Journal.” It would be my guess that the new IC e-newsletter will rely heavily on his FPGA background and experience. This certainly makes sense as over 60% of ASIC designs require some sort of FPGA prototyping for verification.

Kevin’s e-letter joins several other recent editorial/analyst vehicles, including Richard Goering’s SCDsource and Gary Smith EDA. Though competitors of varying degrees, I’m personally glad to see that the EDA/IC world hasn’t lost the significant intellectual property represented by these experts.

But I would offer my colleagues this advice; be careful about going it alone. Collaboration is becoming crucial to success, as readership and the message means continue to change. That is one of the reasons why Chip Design will be partnering with both start-up media firms as well as long established print-online publications to expand our readership and coverage areas. More news soon.

Good luck to all of us in this brave new era of publishing…we’ll need it. — JB

Did you know that January 1^st of every year is considered Public Domain Day, at least in countries that follow the rule of law? On this day the works of authors dead for the past 50 years pass into the public domain. This year our public domain was enriched by such writers, artists, and composers as Nikos Kazantzakis (“Zorba the Greek”), Dorothy L. Sayers (“The Mind of the Maker”), H.P. Lovecraft and many, many others.

Few of these writers that just entered into the public domain were scientists, little lone engineers. Yet significant technology existed back in the late 1930s (author’s death minus 50 years) and before. For example, I remember writing once about the first car-mounted radio telephone invented in the early 20s - “Wirelessly Enabled Cars Come To A Reality Near You.”

Which begs the question: Do technical journal articles abide by the 50 year public domain rule? Such publications have been around since the turn of the early 1900’s. For example, the IEEE was formed from the AIEE (American Institute of Electrical Engineers, formed in 1884), and the IRE (Institute of Radio Engineers, formed in 1912).

It’s a bit of a moot point, since actual technical works – aside from books and articles – become obsolete at an ever increasing rate. The question of technological obsolescence is a fascinating one (see comments by Ray Kurzweil – “The Age of the Spiritual Machines,” Alexander Stille – “The Future of the Past,” Matthew Herber and others), but not one that I want to consider in today’s blog.

Instead, I’m merely curious about the timeframe in which various technologies pass into the public domain. Several years ago, I interviewed Raminda Madurawe, who was then the founder, CEO & President of Viciciv Technology: “The Next Wave of FPGAs.” The interview focused on the effect of expiring Xilinx algorithm patents, which had expired 16 years after the patents were secured.

Is 16 years a typical time frame for technology patents to expire? Yet books on technology “expire” – pass into the public domain – after 50 years from the death of the author. In other words, you could write a book on programmable logic that will not “expire for 50 years. But a key algorithm that enable programmable logic expires after a mere 16 years. Doesn’t make sense, does it? I must be missing something. Can anyone clarify? — JB

Are you ready for the long awaited sequel to “Mysteries of Reproducible Chip Design!” Can today’s chip masters really rearrange the atomic structure of matter to do their bidding? What is the previously hidden relationship between the intricate design of nano-technology chips and the fine art of master painters, like Rothko “White Center?” (see figure) What if these and other secrets fall into the wrong hands? How can the revelations of the high tech masters be protected from undesirable intentions?

The answers to these questions lie hidden in a recently acquired manuscript of the illusive Dr. Ray. Through adventures and editorial license too terrible to mention, I’ve gained exclusive rights to publish portions of his cryptic tome. All will be revealed to those who can read between the lines - in the upcoming issue of Chip Design magazine!

feed://http//www.chipdesignmag.com/blyler/?feed=rss2

Recently, I had the opportunity to attend Cadence’s Annual Design Chain Partners’ Event, which was held at the Corinthian Event Center - San Jose Athletic Club. I came away with the following observations:

I. Keynote by Ed Wan, senior director, Design Services Marketing at TSMC:

Ed’s talk introduced the need for close collaboration at the smaller process technologies. He used the phrase “zero degrees of freedom” between chip design and fabrication, implying a similar zero-point separation between Cadence and TSMC. I understood the marketing implication of this phrase—namely, that Cadence and TSMC are in close alignment for DFM technology. Still, I’m not sure that the phrase makes logical sense. Systems that have zero degrees of freedom yield no useful information. The system has no freedom to vary. Statistically, it would be scatter plot in which there was only one data point. Won’t there always be variations between the design and manufacturing processes? In fact, isn’t that the genesis for a DFM-DFY approach? Yes, I know I’m being pedantic. But doesn’t the term “zero degrees of freedom” imply a certain level of mathematical rigor? Chalk up these semantic differences to the inherent differences between marketing and engineering.

Ed went on to talk about the limiting factors for 45-nm design manufacturing: EDA-tool efficiency, model accuracy, and IP collaboration. He also covered some critical design-manufacturing challenges including radio frequency (RF) on chip at 65 nm. I can only imagine the parasitic problems that such a design might face. It’s a worthy topic for future editorials.

One of the fab-specific topics that Ed mentioned was the benefit—from TSMC’s perspective—of its new $10 billion “Giga Fab,” which really is three fabs in one. (Maybe it should be called a “Tri Fab?”) Each Giga Fab is purported to save about half a billion dollars in building costs. The benefit of such a fab is the ability to qualify three fabs at once for volume production. Still, Ed was quick to add that TSMC will continue to reinforce its smaller and older 8-in. process fabs.

II. Breakout Sessions:

Each breakout session focused on the roadmap for a specific tool area (e.g., digital, custom ICs, and verification). These sessions were informative. For example, I learned that Cadence will never again be offering design-management tools (see Figure 1 - Photographer was Dan Peak. Thx, Dan!). Instead, the company encouraged its customers to use such tools from its Connection Members like ICmanage, Clio Soft, or Enovia (formerly Matrixone?).

Figure 1: Steve Lewis, product marketing director for Custom IC at Cadence, discusses the roadmap during a breakout session.

III. Panel hosted by Richard Goering: “45 nm - Collaborating for Success”

Figure 2: Panel members include Ken MacWilliams, Applied Materials; Richard Brashears, Cadence; Douglas. V. Reid, Freescale; and Aiden Kelly, IBM

Richard Goering moderated a well-attended panel that looked at the need for collaboration at 45-nm chip design and manufacturing. That panel included a chip designer from Freescale, a Cadence executive representing the EDA perspective, a foundry representative from IBM, and an equipment-supplier representative from Applied Materials. In this setting, Freescale and IBM are working together under a variety of umbrella organizations—most noticeably the Common Platform Alliance. As an EDA vendor, Cadence sits comfortably in the middle—not in direct competition with IBM or Freescale (setting aside the issue of the internal EDA tools that each of these manufacturing vendors’ possess).

Cadence panel-member Richard Brashears made several observations about the changing design-manufacturing processes required at the new technology nodes. For example, he noted that there was less time to “polish up” foundry data in Cadence’s manufacturing and yield models before passing the models to the designer community. This was just one of the reasons that an open relationship with the foundries is essential.

Ken MacWilliams, the panelist from Applied Materials, talked about “double-patterning lithography” as a way of mitigating the high cost of lithography tools—some costing more than $50 million by 2009. The cool aspect of double-patterning lithography is that it allows manufacturers to use a less expensive 65-nm lithography process to print “very crisp” 32-nm lines and spaces. Very neat!

When asked about retooling EDA software for advanced manufacturing techniques, such as double patterning, Richard Brashears said that topological controls for planning and routing would probably be needed. Such controls, he noted, would adhere to traditional design rules but in a different way. And there would need to be investment in that technology as well as modeling tools.

The panelists’ predominant message was that collaboration was essential for designs at 45 nm and below. Several questions from the audience questioned the level and likely longevity of such collaboration among former competitors. Predictably, these questions received only superficial answers. But maybe I’m being too harsh in my perceptions. After all, what else would former competitors say? That while it’s painful to collaborate, there is no other path forward—especially in light of global competition and the rising cost of basic research and design? That it’s really collaborate or perish?

The event ended with closing remarks and Partner awards by Mike Fister, Cadence president and CEO, and Kevin Bushby, executive VP of Worldwide Field Operations.

All in all, a good half-day event. — JB

Last week, Cadence announced its acquisition of Clear Shape, which caused quite a stir in the DFM community. For example, Dave Reed, VP of Marketing and Bus Dev for Blaze DFM, had this to say about the announcement:

“DFM problem-reporting tools from vendors like Clear Shape are only valuable if they are incorporated into some other company’s overall optimization solution, so this is a good move for them. Designers have a strong need for an overall electrical DFM solution that includes optimization. We continue to believe that the best solutions will come from pure-play electrical DFM companies that remain focused on this area.”

But what about the world outside of EDA, say, the semiconductor equipment manufacturers? These folks have as much in stake in DFM as their EDA cousins. Indeed, there are continuing rumors that several of the more prominent DFM startups may soon be acquired by the equipment vendors rather than EDA companies. This would make sense in terms of the shifting boundaries between EDA tools and semiconductor equipment manufacturers.

BTW: Has anyone noticed what Mentor is doing with Sierra? May be another piece of the DFM puzzle is falling into place.

What do you think? — John

Have you read Lou Covey’s recent blog on the major changes occurring in the world of EDA media coverage? (http://commbasics.typepad.com/my_weblog) While I disagree with Lou’s calculation that there are only 2.25 EDA journalists left after CMP’s layoffs, I do agree with the rest of his observations (sans his bravado about “being right”).

The EDA media industry is certainly in flux. It’s not dead. In fact, it just became a wee bit more lucrative for “us” few remaining publishers. But it is becoming a low-growth market, especially with Mentor’s acquisition of Sierra (see my blog from last week). This is just one of the reasons why the big EDA equity houses - Blackstone and KKR - have explicitly pulled out of the EDA market (thanks, Pallab). Add to this the ongoing media cuts (CMP now, Penton later - IMHO) and the exodus of EDA journalist talent into other fields outside of publishing, and you have some real fundamental changes taking place.

But such changes can bring opportunities. That’s why - even though I’ll continue to cover the EDA space - I’m expanding my coverage in Chip Design magazine to include the larger world of semiconductors. Other publishing properties under my care already cover the embedded (North American and Asian) markets, vertical electronics markets and, most recently, the world of customized chip research/analysis.

Just one more observation in closing; the media buying practice that Lou cite, i.e., “not advertising and relying on press coverage for awareness,” has resulted in a big decrease in genuinely meaningful editorial product coverage. I’ve noticed that this media practice has been increasing for the last few years in both the chip and embedded publishing worlds. As a consequence, I’ve become extremely cautious in allowing any of my editors to write about specific EDA tool or embedded HW-SW products. This lack of real coverage will leave many vendors at the mercy of user group websites and various on-line discussion threads for analysis of their latest products. Not a very pleasant perspective for the vendors. But that’s what happens when you replace advertising sponsorships with press releases.

– John

There is growing consensus that the next surge in the semiconductor market will be in solid state drive (SSD) technology. Dell has just started selling SSDs in selected notebook computers. Within a couple of years, all laptops may come with such drives. Perhaps this is the motivation from IBMs recent sell-off of its disk drive division to Hitachi (thx for the insight, Garry).

More supporting evidence for the potential growth of solid state drives can be found in a recent iSuppli report:

“Beyond 2007, the prospects for NAND are notably brighter as the PC market moves into the era of flash-based Solid State Drives (SSDs). However, the major NOR suppliers, with their destiny still tied to the mobile-phone market, continue to lack a new killer application that could drive a recovery.” To learn more about this report, please visit iSuppli

(Pictured is the SanDisk SSD SATA 5000 2.5″)