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Our Day at DAC – Day 1 (Monday)

Here are the brief observations on noteworthy presentations, cool demonstrations and hall-way chats from the editorial staff covering “Day 1″ at DAC 2014 – John Blyler, Gabe Moretti and Hamilton Carter.

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DAC Report from Hamilton Carter:

Puuurrrple, so much purple!  The stage at the packed Synopsys, Samsung, ARM briefing this morning was backed by ceiling to floor Synopsys-purple curtains.  The Samsung vision video played on the two large screens on either side of the stage.  To steal a phrase from “Love Actually”, Samsung’s vision is that “touch-screens are… everywhere” .  Among the envisioned apps were a touch screen floor for your kids’ room, complete with planetarium app; a touchscreen window for your Town-Car so you can adjust the thermostat in the car as your driver taxis you to your destintion; and finally a touchscreen gadget for the kitchen that when laid flat weighs the food and registers the number of calories in the amount you’ve sliced off on its cutting board tough screen, displays the recipe you’re using when upright, and finally, get ready for it… checks the ‘safety’ of your food displaying an all clear icon complete with a rad safe emblem.  Apparently the future isn’t completely utopian!

Phil Dworsky, director of strategic alliances, for Synopsys introduced the three featured speakers, Kelvin Low, of Samsung, Glenn Dukes of Synopsys, and Rob Aitken from ARM, and things got under way.  The key impetus of the presentation was that the Samsung/Synopsys/ARM collaboration on 14 nm 3D finfet technology is ready to go.  The technology has been rolled out on 30 test chips and 5 customer chips that are going into production.

Most of the emphasis was on the 14 nm process nodes, but the speakers were also quick to point out that the 28 nm node wasn’t going away anytime soon  With its single patterning, and reduced power consumption, it’s seen as a perfect fit for mobile devices that don’t need the cutting edge of performance yet.

Interesting bits:

  • It was nice to visit with Sanjay Gupta, previously of IBM Austin, who is now at Qualcomm, San Diego.
  • While smart phones have been outshipping PCs for a while, tablets are now predicted to outship PCs starting in 2015.
  • Bryan Bailey of verification fame was one of the raffle winners.  He’s now a part of the IoT!
  • IoT predictions are still in the Carl Sagan range, there will be ‘billions and billions’.
  • Samsung GLOBALFOUNDRIES has a fab, Fab8, in Saratoga, NY.
  • Last year’s buzzword was ‘metric driven’, this year’s is ‘ecosystem’ so far.  The vision being plugged is collaborations of companies and/or tools that work as a ‘seamless, [goes without saying], ecosystem’.

Catching up with Amiq

I got to catch up with Christian from Amiq this morning.  Since they’re planted squarely in the IDE business, Amiq gets the fun job of working directly with silicon design and verification engineers.  There products on display this year include their Eclipse based work environment, with support for e, and SystemVerilog built in, their verification-code-centric linting tool Verissimo, and their documentation generation system Specador.

IC Manage

I’m always drawn in by a good ‘wrap a measurable, or at least documentable flow around your design process story’, so I dropped by the IC Manage booth this morning.

Their product encapsulates many of the vagaries of the IC development flow into a configuration management tool.  The backbone of the tool can be customized to the customer’s specific flow via scripts, and it provides a real-time updated HTML based view of what engineers are up to as project development unfolds.

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DAC Report from Gabe Moretti:

Power Management and IP

Moscone South is all about IP and low power.  This is the 51st DAC and my 34th.  Time flies.  The most intimidating thing is that the Apple Developers Forum is going on at the same time, and they have TV trucks and live interview on the street.  We of course do not.  It was nice to hear Antun Domic as one of the two keynote speakers this morning  His discussion on how the latest EDA tools are used to produce designs fabricated with processes as old as 180 nanometers was refreshing.  In general people equate the latest EDA tools with the latest semiconductor process.  Yet one needs to manage power even at 180 nanometers.

Chip Estimate runs a series of talks from IP developers in its booth.  I listened to Peter Mc Guiness of Imagination Technologies talk about advances in image processing.  it was interesting to hear him talk about lane departure warning as an automotive feature employing such technology.  Now I know how it works in one of my cars.  On the other hand to hear how the retail industry is planning to use facial recognition to choose for me what I should be interested in purchasing is not so reassuring.  But, on the other hand, its use in robotics applications is fashinating.

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DAC Report from John Blyler:

I. IP Panel: The founders for several successful private IP companies shared their experiences with an audience of near 50 attendees. The panelist included CAST, IPExtreme, Methods2Business, and Recore Systems. The main takeaways were that starting an IP company takes passion and a plan.  But neither will work if you don’t have some product to offer and a few key relationships in the industry. (Warren said you need 3 key customers to start.) I’ll write more about this panel later. Here’s a link to a pre-DAC position statements from the panelist.

II. NI and Cadence – The Best of Both Worlds

George Zafiropoulos, VP, Solutions Marketing at National Instruments (NI)-AWR, has brought his many years of chip design and verification experience from the EDA industry to NI. He spoke at the DAC Cadence Theater about post- and pre-silicon verification being the best of both worlds. Those worlds consist of NI, which has traditionally been used for post-silicon verification testing, and Cadence, which is known for pre-silicon design and verification. George has proposed the use of NI test hardware and software to do pre-silicon verification in combination with Cadence’s emulation tools, i.e, Palladium. This proposed combination of tools elicited many questions from the audience who were more familiar with the pre-silicon tools than the post-silicon testers. Verification languages were an issue for those who had never used the Mindstorm or other NI graphic tools suits. I’m sure we’ll learn more on this potential partnership between NI and Cadence tool suites.

III. Visionary Talk by Wally Rhines, CEO, Mentor Graphics (prior to the afternoon keynote):

The title described it all; “EDA Grows by Solving New Problems.” Wally’s vision focused on how EDA industry will grow even with the constraints on its relatively flat revenue. As he noted back in the 2004 DAC keynote, the largest growth with EDA tools is associated with the adoption of new methodologies, e.g., ESL, DFM, and FPGAs. Further, tools that support new methodologies have been the main drives of growth in the PCB and semiconductor worlds.

“EDA need to tap into new budgets … for emulation, embedded software … and in new markets,” explained Rhines. “The automotive industry is at the same stage of development as was the chip design industry in the 1970s. Their development process will have to be automated and with new tools.”

Another growth market will be hardware cyber security.

2 Responses to “Our Day at DAC – Day 1 (Monday)”

  1. stevesliva Says:

    Fab 8 in NY is GlobalFoundries, not Samsung. But they are qualifying the same process in Korea and Dresden/NY:
    http://www.globalfoundries.com/newsroom/press-releases/2011-press-releases/2014/03/01/globalfoundries-and-samsung-extend-fab-sync-to-new-high-performance-28nm-technology-for-mobile-applications

  2. jblyler Says:

    Hi Steve. Thx for the correction. I mentioned it to the editor and updated the post. Cheers. — John

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