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Game Over? – IP beyond Moore’s Law

Will the creation of a repeatable, single-atom transistor mean the end of Moore’s Law and IP as we know it?

Yesterday, every technology-focused website posted some news variation about the creation of the first, repeatable single-atom transistor. What does this event mean to the semiconductor IP community?

Scientists have created a working transistor consisting of a single atom placed precisely in a silicon crystal

 Scientists from the University of New South Wales created a single-atom transistor using a precise and repeatable technique. The key word is “repeatable” which was achieved with the help of a scanning-tunneling microscope (STM). Using the STM, scientists were able to precisely manipulate hydrogen atoms around a phosphorus atom on a silicon wafer.

Although repeatable with great precision, this achievement does not mean the process is commercially viable – at least, not yet. Nevertheless, this breakthrough may accelerate the end game for Moore’s Law. Beyond the single atom lies the world of quantum computing, one which will change the way that chips are designed and manufactured. We’ll examine the quantum computing aspects of this achievement in another blog.

What does it mean to have a single-atom transistor? To answer that, we need to remember that a transistor – regardless of its size – is a device that amplifies and control the flow of an electrical current. When arranged in the proper configuration, transistors can form the very complex logic circuits that are the foundation of today’s computer systems.

Transistors where once the size of vacuum tubes before the creation of solid state manufacturing technology.

The University of New South Wales device meets the definition of a transistor but with one serious restriction. Their single-atom transistor must be kept as cold as liquid nitrogen, or minus 391 degrees Fahrenheit (minus 196 Celsius). According to the scientists, the atom sits in a channel. The flowing electrons must stay in the channel for the transistor to operate. If the temperature rises, then the electrons will gain more energy and move outside of the channel.

In theory, a logic circuit formed from single-atom transistors would be incredibly small. To put this in perspective, Intel’s latest chip, called “Sandy Bridge,” is manufactured with roughly 2.3 billion transistors spaced 32 nanometers apart. A single phosphorus atom is just 0.1 nanometers wide, which would result in incredibly small processors and thus the resulting electronic systems. But as Moore’s’ Law reaches the single-atom stage, look for even greater problems with leakage power and performance.

IP for Single-Atom Transistors?

What does an atom-sized transistor mean to the semiconductor IP community? We can understand the affect by extrapolation from the experience of the last several decades of Moore’s law. IP design and manufacturability is closely tied to the physical contrast and materials of the actual chip.

In a past blog, Neil Hand, group marketing director of SoC Realization at Cadence, explained that IP has always been tied to the manufacturing process and is becoming even more closely tied because of the move to more advanced geometries. He was quick to point out that the relationship to the process differs depending upon the nature of the IP, i.e., whether it is soft or hard IP.

Soft IP isn’t as closely tied to the underlying process as hard IP. Still, an understanding of process capabilities does allow the IP architecture to be optimized for better performance and power. Leveraging the process benefits means that the same IP can be used on different platforms—just as the same video-decoding/decompression IP can be implemented in everything from handsets to home theaters.

On the other hand, hard IP has a tightly coupled architecture that’s determined by underlined process capabilities and physical properties, Hand explains. “It would be impossible to divorce hard IP from the process. As a result, IP companies will be required to have deep in-house process expertise.”

Perhaps this is why IP giants are aligning themselves more closely to the manufacturing process. For example, ARM’s recent acquisition of Prolific, a chip design services company, should strengthen ARM’s physical IP position – including logic, embedded memory and interface cores – at the more troublesome lower nodes.

Will single-atom transistor architectures mean “game over” for Moore’s law? Probably not, since Moore’s law is an economic prediction, not a scientific theory. One way to ensure the continuation of the law is to reduce manufacturing costs. The emerging trend of using 3D layered ICs at existing or even higher process nodes will help reduce these costs while maintaining performance, at least with respect to factors such as device battery life, screen size, weight and others.

An accurate, repeatable process for creating single-atom transistors will bring significant changes to the world of chip design. Semiconductor IP, especially hard IP, is directly affected by any manufacturing changes. Further, IP will need to evolve in other ways, as it current is doing to accommodate 3D die stacking at existing nodes.

Is the IP community up to the change? If the past is any indication, then the answer is definitely – game on!


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One Response to “Game Over? – IP beyond Moore’s Law”

  1. Al Wegener Says:

    Hi John -

    As you clearly state in your article, the manufacturing costs of a single-atom won’t be viable for many years, if ever. And the cost of cryogenic cooling is significant as well, and won’t work in mobile phones.

    I believe that soft IP that transitions easily between process nodes (vs. hard IP that doesn’t) will soon allow a tradeoff between gates and pins. For instance, Samplify’s APAX compression technology puts a small IP block near a memory controller and compresses packets leaving on-chip memories (caches) on their way to DDRx off-chip memory or PCIe links, then decompresses compressed packets arriving from DDRx off-chip memory or PCIe links that’s bound for on-chip memories (caches).

    Since the APAX IP block is so small (fits under a bond pad), it literally makes a DDR3 memory or PCI3 bus 2x to 4x faster, depending on the type of data in the packet.

    So I believe we’re still far from an era where soft IP stops adding value. I sustpect that other soft IP vendors will start to do what Samplify APAX does – trade increasingly cheap (free) gates [courtesy of Moore's Law] for increasingly expensive (and power-hungry) I/O. That seems to me to be a very good tradeoff !

    Cheers,
    Al

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