Part of the  

Chip Design Magazine


About  |  Contact

Carbon’s Exchange Bolsters Front-end IP Chain

Today’s announcement of Carbon’s IP Exchange portal provides evidence of the growing importance of the semiconductor IP design-manufacturing chain.

The third-party IP development chain gains additional support with today’s introduction of Carbon’s IP Exchange portal. According to Bill Neifert, Carbon’s CTO, “the portal is focused on the front-end of the design process to enable virtual platform creation and execution.”

Neifert describes the process as straight-forward: a designer logs into the portal, chooses the IP of interest and configures the block with vendor supported parameters. IP Exchange then automatically compiles a virtual model for that IP block and makes it available for download.  The model is retained on site for use by other team members or for later reconfiguration.

A few months back Synopsys introduced “TMLCentral” – another tool to aid in the front-end IP design activities. Rather than containing any information on IP blocks, the site provided transaction-level representations of IP – a valuable resource to SystemC users. According to Tom De Schutter, senior product marketing manager at Synopsys, “TLMCentral focuses solely on transaction-level modeling and virtual prototyping methodologies.”

Both of these front-end tools – Carbon’s IP Exchange and Synopsys’s TLMCentral – are complementary with the Cadence’s (CE) site. Using designer selected IP, CE’s estimation tools provide trade-off analysis for a variety of backend effects, such as power consumption, die size and even cost. But the CE tools are also used early in the design process where system-wide architectural power and performance trade-offs are examined.

All of these IP portals strengthen the ability of System-on-Chip (SoC) designers to develop and integrate third-party blocks into ever complex designs. The recent introductions of front-end specific IP tools are complementary to existing architectural and back-end offerings. Together, these tool suites re-enforce the growing importance of a healthy IP ecosystem in the design of today’s semiconductor chips.

Originally posted on

Leave a Reply