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Economy Exacerbates Seasonal Decline in Chip Investigations

Although there were slightly more architectural explorations and trade-off analysis studies performed in January’09 than in the previous month, the overall trend in such investigations continues to decline (see chart). The moving average – which serves as a predictor for trends 3-months out – also declined, but at a sharper rate. This decline is worrisome, but must be balanced with the seasonal trends for this time of year. In past cycles, the first 5 months of any given year have shown similar declines in chip investigations at the architectural level.

This data suggests that chip architects and designers are following seasonal patterns, albeit at a declining rate of new chip projects. Next time, I’ll examine our database of users for trends in which process nodes are dominant.

Chip Investigations - Jan09

5 Responses to “Economy Exacerbates Seasonal Decline in Chip Investigations”

  1. Ed Says:

    Hi John,

    on a slightly tangential but related note, what about those chip designers who need to do detailed clock domain synchronization checking at RTL becasue they are including 3rd party IP and needing to verify their IP-laden chip design?

    For example, Atheros Communications appears to be doing this with its wireless applications chi designs.

  2. Dave Says:

    Hi John,

    how did you collect the data?
    I think that is an essential point in order to understand the validity of those numbers….

    – Dave

  3. John Blyler Says:

    Hi Dave. I’ve been posting this data every few months. Originally, I discussed the metrics data in each posting.
    Numbers Support Downturn – for Now
    Chip Starts – Are you an Optimist or Pessimist?
    Chip Numbers Show Growth But Support Slowdown
    A Quick Look at Embedded Memory Trends
    – Etc…

    Here’s a short answer concerning the basis of these reports:
    Basis of Report:
    * Over 44,000 unique worldwide and regional pre-silicon design investigations, aggregated from the major IDMs, design shops and IP vendors.
    * Analysis and forecasting of key chip design metrics including power, die size, clock speed, analog vs. digital IP, metal layers, technology nodes, memory vs. age and much more.

    Let me know if you need more background.

  4. Michel Says:

    Please check Amazon….the net’s best place to meet people…

  5. John Blyler Says:

    Amazon – for the social media challenged. Great place for books, tho.

    … a three hour tour …

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