A strong C/C++ background (for modeling, I assume) plus 10 years of ASIC experience (read “RTL” expert) is a bit much too expect, isn’t it? Thx for sharing.

I found my productivity was greatly enhanced by my ability to write programs to generate reptitive code or add paramization. Areas like physical design and verification use a lot of object oriented concepts which don’t seem so foreign if you have some software development experience.

One thing about job ads, is that if you are starting right out of school you should focus on new grad positions. Other job ads tend to be written by managers who have an ideal picture of a candidate. One job ad put out by a company I worked for wanted someone with 10 years ASIC experience and strong C/C++ skills. Somewhat eliminating most candidates out there.

In a “downturn”, a new grad has the advantage of not requiring a six-figure salary to do ASIC work. Keep that in mind.

Noah.

If that path isn’t available then the next best is what Andre described. Leverage the programming experience into a job working on embedded systems which will provide exposure to hardware and the opportunity to do some FPGA hardware design using verilog. This is a satisfactory job in itself, and if the desire to move to real ASIC design is still there it’s a path to ASIC style synthesis.

There is a broad spectrum of jobs in chip design, from the front end design and verification, synthesis/placement flows, custom or semi custom circuit design, to back end implementation and assembly, to packaging and test, silicon bring up and lab work. There are also side tracks into library development and characterization, analog design, putting together design flows, specializing in structures such as memories or clock trees, even EDA tool development.

Some of these endpoints are much further away from his starting point than others but I believe any of them are reachable over time assuming he has “the knack” and keeps his career goals in mind and continues to strive to achieve them.

Dave’s verification trap does exist but verification isn’t quite the dead end he describes. Some spend their career there and like it. There is a design element to verification, plus the thrill (not everyone gets it) of bug catching. I and others have successfully moved on from verification. Besides, he’s currently working in IT — talk about a trap!

good luck,
–steve

I would hope that because of 1 he would start to understand analogue electronics and also digital electronics. Note also that a lot of Microcontroller boards come with various example circuits so this would help.

The next step from there is that he would want to create something complex digitally yet this would be cumbersome using discrete logic. Thus moving on to a CPLD or FPGA.
To use this he would then have to learn a HDL.
Dare I say (and this make me slightly grind my teeth ! ) as he is familiar with C/C++ then he would have more affinity to Verilog, but VHDL would be (IMHO) be a better option. He would have to learn how to describe a circuit by drawing it and then describing it.
Cypress used to do something called Warp, it even included a book on using VHDL and another describing various circuits and designs.
However Xlinx and Altera do the design packages for almost nothing if not free these days that come with a simulator.

If he went down that route (and it isn’t a short one) then he could demonstrate enough of a skill set to allow him in as a graduate working on some low level IP.
From there he could then start to get really into chip design as his experience grows.

Also he would be exposed directly to things that may make him think that there are alternative options that he might enjoy.

Even with an education that is designed for chip design it does not directly give you the appreciation of how to design a chip, it’s like all Engineering, you have to do it to understand it.

By the way as to the remark from one of your previous respondants, where exactly are these 400,000 Chip Design jobs in Scotland ?

1. Hiring managers do not respect book learning. Spending money on
classes is a waste of time. Only on-the-job training counts.

2. When going for a job, pay attention to which language they are using.
System Verilog is the up-and-coming language. VHDL is used for military,
aerospace, and European stuff. Plain old verilog rules everywhere else.
Nobody in the real world designs chips using C++.

3. Try not to get stuck in verification. They will tell you some fairy tale
about how you do verification for a couple of years and then you get
to do design, but it’s not true. You’ll get type-cast as a verification guy
and will never get to do design. (I have 5 years of verification.)

4. FPGAs are steadily taking market share away from ASICs. This is good
news and it is bad news. The good news is that FPGAs are a lot easier
and cheaper than ASICs. The bad news is that FPGA tools are cheaper,
and they are not very good.

5. Systems increasingly have embedded processors, usually some kind of
32-bit RISC machine like an ARM or a PowerPC. This means that you will
have to have a fairly high level of knowledge of real-time embedded
software if you want to be a senior chip designer. The ability to write
a device driver for VxWorks is going to be good enough.

As regards the issue of how to get that first job, there are two
basic approaches:

1. Go to some place like Silicon Valley, Northern Virginia, or Southern
California and keep applying for jobs until you get one. This will take
a while, considering the fact that we are in a recession.

2. Apply all over the country for ASIC designer jobs and/or FPGA designer
jobs. Move to Lexington, KY if that’s where the job is.

Oh, yeah. Every day that you are unemployed, call your Congressman
and tell them that there is NOT a shortage of Engineers in this country
and that we do NOT need to import any more H1-B slaves.

That last part is kind of important.

-dave

BTW: Congrats Alan on your (OptNgn) new optimized FFT library suite for FPGA designs, sold and supported by Impulse Accelerated.
http://optngn.com/site/

Getting practical knowledge by doing systems/chips is the only way to actually
get into this line of work.

alan

I think part of the difficulty is that chip hardware and software (including device drivers, RTOS and even application level) need to be designed at the same time (as closely as humanly possible) in the early phases of the product life cycle. This means that, in addition to the prerequisite knowledge, hw engineers should know how to program in C/C++. I believe most EEs now use C/C++ as the design language in their basic circuits analysis course. (I used Fortan, but that was a few years ago.)

Tighter design times mean that programmers (CS degrees) need to understand more of the basics of hw devices. I’m seeing this push in the local PSU CS program, but it has a long way to go.

Perhaps a tangential question would be: What is meant by a chip designer?

therefore you need an Msc in Microelectronics nothing less will do.

I’d love to work in Scotland for a while.