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Archive for July, 2008

Beauty in Chip Failures

Thursday, July 17th, 2008

“Beauty is in the eye of the beholder” — Greek, 3rd century BC

The pictures of the impurities that cause chip failures can be amazing. Below is a sample of an AL-based flower like crystalline impurity. For more, visit the IEEE Online – The Art of Failure.

Another One (Pub) Bits the Dust

Thursday, July 17th, 2008

My former publisher, Penton Media, continues to struggle through the challenges that are facing all publishers: “John French released an internal memo today announcing that he is stepping down as CEO of Penton Media.”

Recently I learned that RF Design magazine folded – part of the consolidation of pubs after the Prism purchased Penton last year. This consolidation made sense as RF Design magazine competed with Penton’s Microwaves and RF book. Hope that Ashok Bindra, the Editor-in-Chief of RD Design, has been able to find work.

Also note that Dan Harris, the digital editor at Electronic Design, has also left Penton.  And so the collective editorial talent pool continues to decline – not a good sign for the industry or the engineers that rely on independent technology and news coverage.

On a happier note, I see that Nancy Friedrich – my old friend and colleague at Penton – has become the Editor-in-Chief of Microwaves and RF magazine. Believe that the former EiC of the pub – Jack Browne – is still around as well. Congrats, Nancy!

Virtutech’s Software creates Hardware

Friday, July 11th, 2008

Well, not quite – but close. Here’s what I mean: Software virtual prototypes can be used to verify hardware designs before the hardware even exists. So what, you say? That’s been possible for years. But did you know that newer virtual models allow the software engineers to tweak memory size and processor-memory interconnects in order to optimize their applications run time and power usage. These “tweaks” can then be fed-back to the hardware team to optimize the SOC – before the SoC has been produced. Before the first respin!

For a case in point, consider Virtutech’s recent announcement concerning the Freescale QorIQ P4080 multicore process, one that won’t even be available until later this year. Virtual models of the processor SoC, created using Virtutech’s Simics tool, are being used now by direct processor customers and even their customers. The feedback from these software teams will help verify and even change the design of the final SoC.

Thanks to Michel Genard, Virtutech Vice president of Marketing, for explaining the importance of this emerging process in the hardware-dominated world of EDA tools and chip design. Watch for more coverage soon.

Open Source Hardware and EDA tools

Monday, July 7th, 2008

Did you know there is an active open source CAD community? Not freeware or shareware CAD programs, which have been available for some time, but Open Source CAD community! Very cool site, with lots of applications for electronics design that include: schematic capture, bill of materials generation, netlisting, analog and digital simulation and PCB layout. The apps are released under the terms of the GNU General Public License.

[Interesting note: I started using GNU software back in 1995 with a lovely little program called “Ghostscript.? Anyone remember Ghostscript?]

BTW: Don’t get excited when you visit the Open Source CAD website and see the term gEDA. It doesn’t mean chip level design tools, as in Cadence-Mentor-Synopsys equivalent – just board-level tools. Which shouldn’t be surprising, since a quick surf over to Wiki reminds us of the true meaning of EDA:

Electronic design automation (EDA) is the category of tools for designing and producing electronic systems ranging from printed circuit boards (PCBs) to integrated circuits. This is sometimes referred to as ECAD (electronic computer-aided design) or just CAD.

Why am I mentioning this bit of trivia? To call everyone’s attention – especially local Portland Tech’ers – to the following presentation at next week’s Open Source Conference (OSCON):

Creating Open Source Electronic Hardware with Open Source Software?
Tom Anderson (Agilent Technologies)
11:35am – 12:20pm Friday, 07/25/2008
Tom Anderson works as a design automation scientist for Agilent Technologies. His current work project is to invent new circuit simulation capabilities for Agilent engineers. On his own time he builds electronics projects and is an author for MAKE magazine, and creates Open Source Hardware for Quaketronics.
See you there!

Watch Out, Cadence! The Hunter May Become the Hunted

Tuesday, July 1st, 2008

The problem with hostile take-over attempts is that they expose the aggressor to (perhaps) unwanted attention. I’ll explain the “perhaps? emphasis shortly. But first, consider this scenario which was shared with me by a friend on the financial side of this misadventure.

Cadence is trying to forcibly acquire Mentor. Others are debating whether the move is based on business strategy – namely, to acquire Mentor’s very profitable Calibre tool product line – or to distract Cadence’s investors from recent disappointing earnings. Regardless, the takeover bid has exposed Cadence’s financial position to the larger investment and corporate world.

Some big players in the investment market are now wondering if a bigger fish, like AutoDesk or Dassault Systèmes, will make a play for Cadence. Here’s the reasoning: Cadence had to show their hand in order to make the bid for Mentor. While strong in some regards, Cadence’s financial position is not as firm as many might think. From a financial standpoint, they are under-performing. Twice this year they have pulled back their estimates and are currently revising their guidance for the rest of the year. Perhaps most telling was that Cadence seemed to lack enough of their own cash reserves to secure the $1.6B take-over price offered to Mentor. Apparently, the company is floating $1.1B of the $1.6B by way of a bond aimed at off-shore investors. If true, that means that Cadence is using only $500m of its own money for the takeover.

Now, $500 million is still a nice chunk of walking-around money. Plus Cadence has a reasonably healthy client base. The cash flow needs some help, but that can be improved – in the short term by a take-over of Mentor. All of these factors are catching the attention of several big multinational firms, like AutoDesk and Dassault Systèmes. The big ERP companies – such as SAP or Oracle – are less likely to be interested in EDA companies like Cadence since they already make a mint from the semiconductor fab side of the market.

An acquisition of Cadence by AutoDesk – makers of AutoCAD – does make sense. Cadence makes several good point tools that would complement AutoCAD’s existing product engines, e.g., in the aircraft, automotive and multimedia markets. AutoCAD has all the 3D modeling, rendering and packaging tools that are coveted by the major EDA companies. AutoCAD is truly a big fish with around $4 ½ B in sales and a market cap of $9B. This makes AutoCAD roughly four times the size of Cadence. So an acquisition of Cadence makes both technical and financial sense.

As I wrote before: This summer promises to be a “fun? time for the usually quiet world of EDA tools! Watch out Cadence.