JB’s Circuit

You decide which editor is the sage adviser and which is the misguided padawan. I’m the handsome one kneeling on the left, providing learned council to a good Jedi Knight. My trusted FPGA Dev e-letter editor - Jim Kobylecky - is kneeling on the right, next to the evil storm trooper. Feel free to make an unbiased decision.

BTW: This picture was taken at the sponsor event (Intel and Mentor) that publicly opened the Oregon Museum of Science and Industry (OMSI) “Star Wars - Where Science Meets Imagination” event.

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The above ASCII art is supposed to look like a turkey. However, thanks to the miracle of HTML, your viewing pleasure may vary. At any rate, I wish everyone a Happy Thanksgiving!
BTW: Here’s a great site for ASCII art (thanks, Chris): http://www.chris.com/ASCII/

Has anyone been following the purported Bell Labs cover-up of the pre-Shockley, Lilienfeld transistor? Speculation on a discussion thread on sci.engr.semiconductors (http://groups.google.com/group/sci.engr.semiconductors) suggests that Bell labs “… had avoided referencing Lilienfeld’s work in Shockley’s 1948 paper announcing that Lilienfeld’s FET transistors gave substantial gain.” The three Lilienfeld patents from the early 1930’s can bee seen at http://patft.uspto.gov/netahtml/PTO/srchnum.htm.

Very interesting thread if you have the time to read all the postings. Of course, I’m assuming that today’s EDA designers even care about – or have ever seen – the commodities we call transistors. Cheers. — John

Hello world. Today’s marks the return of the blogs for Chip Design magazine. Did you miss us? Don’t answer that question. But we do hope that you’ll drop by from time to time to read the editor’s blogs on conferences, new technologies and insights about the dynamic and often mystifying world of chip design. Cheers. — JB