The ESL Edge


Brian BaileyBrian Bailey is an independent Electronic Design Automation consultant working with ESL, verification and system design companies. Prior to that he was with Mentor Graphics for 12 years, with his final position being the Chief Technologist for verification, Synopsys, Zycad, Ridge Computers and GenRad. He graduated from Brunel University in England with a first class honours degree in electrical and electronic engineering.

Brian is the co-author of the book ESL Design and Verification: A prescription for Electronic System Level Methodology (Elsevier 2007), co-editor of the book Taxonomies for the Development and Verification of Digital Systems (Springer, 2005) and the executive editor and author for The Functional Verification of Electronic Systems: An overview from various points of view (IEC Press, 2005) and Intellectual Property for Electronic Systems: An essential introduction (IEC Press 2007). He has published many technical papers, given keynote speeches at conferences, performed seminars around the world, and been both a contributor and moderator of panels at all of the major conferences.

Brian established the functional verification track in the DesignCon conferences, which has quickly grown to be one of the major tracks of the conference. He also serves on the technical program committees of many major conferences including DAC. He chairs the interfaces standards group within Accellera and has in the past chaired other standards groups in Accellera and VSIA.

Brian is primarily interested in the specification, simulation and analysis of embedded systems and today is moving into the problems associated with, and solutions necessary for, multi-processor systems.

He can be reached at brian_bailey at acm dot org

2 Responses to “About”

  1. 1
    SKMurphy » Non-Customers Are Where Important Changes Often Start Says:

    [...] was reminded of the value of talking to non-customers by a September 16 blog post by Brian Bailey entitled “Bye Bye Cadence.” Recent events may have rendered the title unintentionally [...]

  2. 2
    Conventional Wisdom and the “Intelligent Test Bench” « No one is invincible! Says:

    [...] Brian Bailey has writen a compatible definition of an intelligent test bench in the following quote: An intelligent testbench can either replace or enhance existing simulation based or formal verification methodologies. Constrained random generation techniques manage to create huge quantities of stimulus, but at the end of the day they have difficulties both with closure (achieving the desired verification goals) and secondly with efficiency (huge server farms required). An intelligent testbench can help either by determining efficient stimulus sets or by finding ways to reach difficult to reach coverage points. [...]

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