Mar
What a charming little book!
What a charming little book! If that sounds in any ways demeaning, then that is not at all what is meant. A few weeks ago, Ray Salemi, an applications engineering consultant from Mentor Graphics, sent me a pre-publication copy of his new book entitled “FPGA Simulation. A complete Step-by-Step Guide.” Most books set out to cover new ground, to promote the latest tool, language or methodology, to bring the latest thinking on an emerging area – not this book. In fact nothing in this book is new or perhaps even exciting to most people in the industry. It talks about the mundane, the technologies that advanced users have been using for quite some time. So why do I like this book? Because it attempts to convert the laggards, to show them that there is a better way. The people we are referring to are the FPGA developers who have reasoned – why do I need to use a simulator? This design is going into an FPGA, why not just put it there and let it rip!! While that may have worked for some people in the past, it is quickly becoming a way to ensure that the product never gets out of the door.
Rather than just tell these people: you got it all wrong and here is a modern verification methodology that you should be using, the book guides them in small, manageable steps to a better, brighter future. Each chapter gently guides them up the progress ladder in steps that add value and slowly build upon the previous steps. While there may be a little bit of waste along the way given the end-point that is reached, there is little waste at each stage of the progression, and each stage adds new value and capabilities.
This book would also be good for someone who is just starting out in verification. It provides an overview of many subjects without going too deep into any of them, but deep enough, and with enough examples that they can get a practical grounding. I think Ray will have a lot of success with this book. He has also set up a companion website http://www.fpgasimulation.com where he continues to provide additional insights and worked examples to common issues.
I do have a couple of gripes with the book. The first is not their fault at all, but the fault of our industry. Because of the number of languages that we have (Verilog, VHDL, SystemVerilog, PSL) it takes almost 90 pages to describe how to use OVL and that may be enough to turn off many people at step three of seven along the adoption path as defined. Why can’t we make things easy for the users even if it means that the implementation is a little harder and takes a little longer? At the very least – hide our mistakes from the potential user community. The second gripe is the price. While the asking price of $97.95 is not out of line with many of the books within the EDA field, this is a high price for FPGA developers and may significantly limit their sales – especially in the downturn that the industry is currently facing.
But leaving those issues behind, this book is a valuable new book that fills a niche that has not been addressed to date. I do not hesitate to give this book the thumbs up! Two thumbs up!!
Brian
It is a shame the book is so expensive. Given that the likes of Altera give away a version of Modelsim with their Web Edition tools there is no excuse for not simulating a design. I suppose many FPGA designers started out with small devices/designs and either got it right first time or did not mind debugging (and re-building) their design. That said FPGAs are great for verifying a chip design in a real-world environment!
March 31st, 2009 at 6:31 amHi Brian,
I just wanted to let you know that the pricing issue has been addressed. You can see the new pricing at http://shop.fpgasimulation.com.
Thanks for the feedback!
Ray
June 2nd, 2009 at 11:45 pm