Mar
Hybrid prototype – are we there yet?
In a recent Synopsys press release they talked about the advances that they were making in their Confirma™ and CHIPit® product lines. Clive Maxfield did an excellent write-up of this in Programmable Logic DesignLine which I will not repeat here. Along with the press release, Synopsys also sent out a number of frequently asked questions related to this technology. Scanning that I saw something that really peaked my interest.
They were discussing the potential for product overlap between Confirma and Innovator. Confirma is the FPGA rapid prototyping environment that came from Synplicity and Innovator is their system level virtual prototype based on the Virtio technology. They said:
“Going forward, customers may not have to choose between the two approaches. Hybrid prototyping is an emerging approach that combines virtual platforms and rapid prototypes into a single unified system representation. This approach enables legacy blocks of RTL to be included in virtual platforms without impacting performance, and transaction level models to be included in rapid prototypes for higher performance or improved debug features.”
I believe that this is potentially huge. It would allow for a single unified prototyping environment to exist all the way from design conception to deployment in the field with the ability to arbitrarily replace any design block with models at different levels of abstract, with an FPGA mapped version or with real hardware.
I questioned their marketing department about these statements and received this response from Frank Schirrmeister, the director of marketing for the Innovator product line:
“We have demonstrated interfaces to hardware based solutions for a while with Eve and Palladium. We now have the three necessary technology components in house and are preparing for demonstrations with various customers. Here are the three technology components to enable hybrid solutions: Starting on the hardware side, physical interfaces must be provided to connect the actual hardware prototype to the workstation running the simulation. PCI Express is a common solution here. Second, data must be transported using an agreed upon protocol between the software and hardware worlds. SCE-MI has become a standard in this domain. Finally, for conversion from the transaction-level model to the transport interface, transactors are necessary to translate high-level protocols like AXI, OCP and AMBA.”
Frank also wrote about this in his Blog entry. I am very much looking forward to the day when this is released, but for now we just have to relax in the comfort of knowing that Synopsys is actively working on it. Of course there is no harm in asking “is it ready yet?”
