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• Blogs
Rick's Wireless Networking
Tools and the Debug Cycle
The efficiency of a development or debug tool needs to be looked at with the perspective on how it effects the debug cycle...
Pallab's Place
RSA Conference 2008
The keynotes RSA Conference held in San Francisco followed the theme that data Security is no longer an option, it is...
JB's Circuit
What was the Antikythera Mechanism?
Is it the world's oldest-geared driven analog computer? That’s the claim of this admittedly unscientific web site called...
Fahrvergnügen
Can ASIC verification be fun?
The German word Fahrvergnügen directly translated means “the joy of driving“, and anybody who has ever driven a...
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• Latest News
- Bluespec Expands into Japanese Market with CYBERNET May 9, 2008
- CoWare Establishes Direct Presence in Israel May 9, 2008
- DMP Slashes IP Power Needs with Sequence PowerTheater May 8, 2008
- Multicore Association Adds CriticalBlue to Its Membership May 8, 2008
- TM Technology Adopts ARC for Multimedia Storage May 8, 2008
- Chinese Market To Be Dominated by Taiwan May 8, 2008
- NextIO Sets I/O Virtualization Chip on VMM and Synopsys May 8, 2008
- Accellera Ramps Up IP Verification and Interoperability May 7, 2008
• Top Stories
- RFID from Medical Supplies to Bananas May 9, 2008
- Time's Up for Clock-Based Buses on Multicore Chips May 9, 2008
- Chinese Market To Be Dominated by Taiwan May 9, 2008
- What You Need to Know about PCI Express May 9, 2008
- Note to Startups - Work on your Briefings May 9, 2008
- Time's Up for Clock-Based Buses on Multicore Chips - Chip Designer, May 2, 2008
- Editor's Note - IP Designer & Integrator, Apr 30, 2008
- Prototyping as Productive Verification Methodology - Commentary, May 9, 2008
• iDesign
iDesign - Providing the advanced IC Design market access to high-value information and essential tools. (Learn more)
Look for the gold star icon 
, featured on www.chipdesignmag.com, to discover content available exclusively to iDesign subscribers. All subscribers to Chip Design Magazine are automatically enrolled in an 8 week free trial. Click Here to ensure you are enrolled in a free trial.
Max’s Chips and Dips: Silicon Canvas... by Clive “Max” Maxfield(iDesign Subscribers
)Recently, I was chatting to the folks at Silicon Canvas, and I'm still trying to wrap my brain around all of the incredible...
Max’s Chips and Dips: RFID from Medical... by Clive “Max” Maxfield(iDesign Subscribers
)Universal, affordable, smart label RFID chip from IDS Microchip opens multiple new markets for automatic...
Max’s Chips and Dips: Chip-Package-Board... by Clive (Max) Maxfield(iDesign Subscribers
)In the case of today’s bleeding-edge SoC, Sip, PiP, and PoP components, it is no longer possible for the chip, package...
Methodology and Flow Challenges in System-level... by Keith Felton, Cadence Design Systems(iDesign Subscribers
)Today’s designs require new robust design flows with concurrent capabilities that bridge the communication gap...
• Chip Design Trends
Are you up-to-date on important SoC and IP design trends, analysis and Market forecasts?
Now Available! Save $500 by ordering before April 30th.
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- New design activity surged in Europe, followed by increases in the Asia-Pacific region and relative flat growth in North America
- Use of semiconductor IP continued to increase, with analog-mixed signal and digital-core IP showing the largest segment growth –up by 35%!
- Hot markets include communications, data processing and industrial-medical.
- Overwhelming evidence supports the slowing of Moore’s Law.
Chip Design Trends also offers Customized Market Research Services.
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• Focus Reports
- Chip-Package-Board Co-Design: It's a Brave New World
In the case of today’s bleeding-edge SoC, SiP, PiP, and PoP components, it’s no longer - Second-Tier EDA Vendors Must Collaborate to Survive
With today's mature chip-design flow, innovative point solutions must support multiple vendor formats and strive to work within established standards. - Future Verification Appears Uncertain
The EDA market is struggling to solve new verification challenges. - Will changes in investment patterns dampen the market rollercoaster?
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